source: mainline/arch/mips/include/context.h@ 0b512a8

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 0b512a8 was 2bd4fdf, checked in by Ondrej Palkovsky <ondrap@…>, 20 years ago

MIPS bug fixes.
Added usermode to MIPS, unfortunately impossible to test until
MM is ready.

  • Property mode set to 100644
File size: 2.8 KB
Line 
1/*
2 * Copyright (C) 2001-2004 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#ifndef __mips_CONTEXT_H__
30#define __mips_CONTEXT_H__
31
32#define STACK_ITEM_SIZE 4
33
34/* These are offsets into the register dump saved
35 * on exception entry
36 */
37#define EOFFSET_AT 0
38#define EOFFSET_V0 4
39#define EOFFSET_V1 8
40#define EOFFSET_A0 12
41#define EOFFSET_A1 16
42#define EOFFSET_A2 20
43#define EOFFSET_A3 24
44#define EOFFSET_A4 28
45#define EOFFSET_T1 32
46#define EOFFSET_T2 36
47#define EOFFSET_T3 40
48#define EOFFSET_T4 44
49#define EOFFSET_T5 48
50#define EOFFSET_T6 52
51#define EOFFSET_T7 56
52#define EOFFSET_T8 60
53#define EOFFSET_T9 64
54#define EOFFSET_S0 68
55#define EOFFSET_S1 72
56#define EOFFSET_S2 76
57#define EOFFSET_S3 80
58#define EOFFSET_S4 84
59#define EOFFSET_S5 88
60#define EOFFSET_S6 92
61#define EOFFSET_S7 96
62#define EOFFSET_S8 100
63#define EOFFSET_GP 104
64#define EOFFSET_RA 108
65#define EOFFSET_SP 112
66
67#define EOFFSET_LO 116
68#define EOFFSET_HI 120
69#define EOFFSET_STATUS 124
70
71#define REGISTER_SPACE 128
72
73/*
74 * Put one item onto the stack to support get_stack_base().
75 */
76#define SP_DELTA (0+STACK_ITEM_SIZE)
77
78
79#ifndef __ASM__
80
81#ifndef __mips_TYPES_H_
82# include <arch/types.h>
83#endif
84
85/*
86 * Only save registers that must be preserved across
87 * function calls.
88 */
89struct context {
90 __u32 sp;
91 __u32 pc;
92
93 __u32 s0;
94 __u32 s1;
95 __u32 s2;
96 __u32 s3;
97 __u32 s4;
98 __u32 s5;
99 __u32 s6;
100 __u32 s7;
101 __u32 s8;
102 __u32 gp;
103
104 __u32 pri;
105};
106
107#endif /* __ASM__ */
108
109#endif
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