| [1141c1a] | 1 | #
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| [ee7e6ace] | 2 | # Copyright (C) 2005 Ondrej Palkovsky
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| [1141c1a] | 3 | # All rights reserved.
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| 4 | #
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| 5 | # Redistribution and use in source and binary forms, with or without
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| 6 | # modification, are permitted provided that the following conditions
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| 7 | # are met:
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| 8 | #
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| 9 | # - Redistributions of source code must retain the above copyright
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| 10 | # notice, this list of conditions and the following disclaimer.
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| 11 | # - Redistributions in binary form must reproduce the above copyright
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| 12 | # notice, this list of conditions and the following disclaimer in the
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| 13 | # documentation and/or other materials provided with the distribution.
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| 14 | # - The name of the author may not be used to endorse or promote products
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| 15 | # derived from this software without specific prior written permission.
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| 16 | #
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| 17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | #
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| 28 |
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| [8fc0d455] | 29 | #include <arch/mm/page.h>
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| [6f878b7] | 30 | #include <arch/mm/ptl.h>
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| [8fc0d455] | 31 | #include <arch/pm.h>
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| [89344d85] | 32 | #include <arch/cpu.h>
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| [c4b3e3e] | 33 | #include <arch/cpuid.h>
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| 34 | #include <arch/boot/boot.h>
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| [1141c1a] | 35 |
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| [7df54df] | 36 | #define START_STACK_64 0xffffffff80007c00
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| [6f878b7] | 37 |
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| [1141c1a] | 38 | #
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| 39 | # This is where we require any SPARTAN-kernel-compatible boot loader
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| 40 | # to pass control in real mode.
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| 41 | #
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| 42 | # Protected mode tables are statically initialised during compile
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| 43 | # time. So we can just load the respective table registers and
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| 44 | # switch to protected mode.
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| 45 | #
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| [c4b3e3e] | 46 |
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| 47 | #define START_STACK (BOOTSTRAP_OFFSET-0x400)
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| 48 |
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| [874e312a] | 49 | .section K_TEXT_START, "ax"
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| [6f878b7] | 50 | .code16
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| 51 | .global kernel_image_start
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| [1141c1a] | 52 | kernel_image_start:
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| [c245372b] | 53 | cli
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| 54 | xorw %ax,%ax
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| 55 | movw %ax,%ds
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| [b1cf98c] | 56 | movw %ax,%es
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| [c245372b] | 57 | movw %ax,%ss # initialize stack segment register
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| [c4b3e3e] | 58 | movl $(START_STACK), %esp # initialize stack pointer
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| [c245372b] | 59 |
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| [7df54df] | 60 | call memmap_arch_init
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| [c245372b] | 61 |
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| [8fc0d455] | 62 | movl $0x80000000, %eax
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| [c245372b] | 63 | cpuid
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| 64 | cmp $0x80000000, %eax # any function > 80000000h?
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| 65 | jbe no_long_mode
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| [c4b3e3e] | 66 | movl $(AMD_CPUID_EXTENDED), %eax # Extended function code 80000001
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| [c245372b] | 67 | cpuid
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| 68 | bt $29, %edx # Test if long mode is supported.
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| 69 | jnc no_long_mode
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| [1141c1a] | 70 |
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| [6f878b7] | 71 | # Load gdtr, idtr
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| [3396f59] | 72 | lgdt real_bootstrap_gdtr_boot
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| [6f878b7] | 73 |
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| 74 | movl %cr0,%eax
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| 75 | orl $0x1,%eax
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| 76 | movl %eax,%cr0 # switch to protected mode
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| [1141c1a] | 77 |
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| [b9e97fb] | 78 | jmpl $gdtselector(KTEXT32_DES), $now_in_prot
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| [1141c1a] | 79 |
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| [6f878b7] | 80 | no_long_mode:
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| 81 | 1:
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| 82 | jmp 1b
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| [8ccec3c1] | 83 |
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| 84 | .code32
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| 85 | .align 4
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| 86 | multiboot_header:
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| 87 | .long MULTIBOOT_HEADER_MAGIC
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| 88 | .long MULTIBOOT_HEADER_FLAGS
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| 89 | .long -(MULTIBOOT_HEADER_MAGIC + MULTIBOOT_HEADER_FLAGS) # checksum
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| 90 | .long multiboot_header + BOOT_OFFSET
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| 91 | .long unmapped_ktext_start + BOOT_OFFSET
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| 92 | .long 0
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| 93 | .long 0
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| 94 | .long multiboot_image_start + BOOT_OFFSET
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| 95 |
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| 96 | multiboot_image_start:
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| 97 | movl $START_STACK, %esp # initialize stack pointer
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| 98 | # FIXME TODO
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| [1141c1a] | 99 |
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| [946b630] | 100 | # Protected 32-bit. We want to reuse the code-seg descriptor,
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| 101 | # the Default operand size must not be 1 when entering long mode
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| [6f878b7] | 102 | now_in_prot:
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| 103 | # Set up stack & data descriptors
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| [b9e97fb] | 104 | movw $gdtselector(KDATA_DES), %ax
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| [6f878b7] | 105 | movw %ax, %ds
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| 106 | movw %ax, %ss
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| 107 |
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| [c4b3e3e] | 108 | movb $0xd1, %al # enable A20 using the keyboard controller
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| 109 | outb %al, $0x64
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| 110 | movb $0xdf, %al
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| 111 | outb %al, $0x60
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| 112 |
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| 113 |
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| [6f878b7] | 114 | # Enable 64-bit page transaltion entries - CR4.PAE = 1.
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| 115 | # Paging is not enabled until after long mode is enabled
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| 116 | movl %cr4, %eax
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| 117 | btsl $5, %eax
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| 118 | movl %eax, %cr4
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| 119 |
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| 120 | # Set up paging tables
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| 121 | leal ptl_0, %eax
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| 122 | movl %eax, %cr3
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| [c4b3e3e] | 123 |
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| [6f878b7] | 124 | # Enable long mode
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| [89344d85] | 125 | movl $EFER_MSR_NUM, %ecx # EFER MSR number
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| [6f878b7] | 126 | rdmsr # Read EFER
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| [89344d85] | 127 | btsl $AMD_LME_FLAG, %eax # Set LME=1
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| [6f878b7] | 128 | wrmsr # Write EFER
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| [c245372b] | 129 |
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| [6f878b7] | 130 | # Enable paging to activate long mode (set CR0.PG=1)
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| 131 | movl %cr0, %eax
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| 132 | btsl $31, %eax
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| 133 | movl %eax, %cr0
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| [c245372b] | 134 |
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| [6f878b7] | 135 | # At this point we are in compatibility mode
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| [b9e97fb] | 136 | jmpl $gdtselector(KTEXT_DES), $start64
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| [c245372b] | 137 |
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| [6f878b7] | 138 | .code64
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| 139 | start64:
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| [c4b3e3e] | 140 | movq $(PA2KA(START_STACK)), %rsp
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| 141 |
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| 142 | # Copy kernel to higher physical memory
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| 143 | movq $BOOTSTRAP_OFFSET, %rsi
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| 144 | movq $BOOTSTRAP_OFFSET + BOOT_OFFSET, %rdi
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| 145 | movq $_hardcoded_kernel_size, %rcx
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| 146 | cld
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| 147 | rep movsb
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| [6f878b7] | 148 |
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| 149 | call main_bsp # never returns
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| [c245372b] | 150 | 1:
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| 151 | jmp 1b
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| [b9e97fb] | 152 |
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| [874e312a] | 153 | .section K_DATA_START, "aw", @progbits
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| [1141c1a] | 154 | .align 4096
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| [b9e97fb] | 155 |
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| [a16bfd0] | 156 | # Identical mapping of first 64MB and the same of -2GB -> 0
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| [6f878b7] | 157 | .global ptl_2
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| 158 | ptl_2:
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| 159 | .quad 0x0 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
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| 160 | .quad 0x200000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
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| 161 | .quad 0x400000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
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| 162 | .quad 0x600000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
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| 163 | .quad 0x800000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
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| 164 | .quad 0xa00000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
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| 165 | .quad 0xc00000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
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| 166 | .quad 0xe00000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
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| [a16bfd0] | 167 | .quad 0x1000000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
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| 168 | .quad 0x1200000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
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| 169 | .quad 0x1400000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
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| 170 | .quad 0x1600000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
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| 171 | .quad 0x1800000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
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| 172 | .quad 0x1a00000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
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| 173 | .quad 0x1c00000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
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| 174 | .quad 0x1e00000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
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| 175 | .quad 0x2000000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
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| 176 | .quad 0x2200000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
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| 177 | .quad 0x2400000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
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| 178 | .quad 0x2600000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
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| 179 | .quad 0x2800000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
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| 180 | .quad 0x2a00000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
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| 181 | .quad 0x2c00000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
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| 182 | .quad 0x2e00000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
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| 183 | .quad 0x3000000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
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| 184 | .quad 0x3200000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
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| 185 | .quad 0x3400000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
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| 186 | .quad 0x3600000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
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| 187 | .quad 0x3800000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
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| 188 | .quad 0x3a00000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
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| 189 | .quad 0x3c00000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
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| 190 | .quad 0x3e00000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
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| [6f878b7] | 191 |
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| 192 | .align 4096
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| 193 | .global ptl_1
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| 194 | ptl_1:
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| 195 | .quad ptl_2 + (PTL_WRITABLE | PTL_PRESENT)
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| 196 | .fill 509,8,0
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| 197 | .quad ptl_2 + (PTL_WRITABLE | PTL_PRESENT)
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| [ae9624e] | 198 | .fill 1,8,0
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| [6f878b7] | 199 |
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| 200 | .align 4096
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| 201 | .global ptl_0
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| 202 | ptl_0:
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| 203 | .quad ptl_1 + (PTL_WRITABLE | PTL_PRESENT)
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| 204 | .fill 510,8,0
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| 205 | .quad ptl_1 + (PTL_WRITABLE | PTL_PRESENT)
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| 206 |
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| [3396f59] | 207 | .global real_bootstrap_gdtr_boot
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| 208 | real_bootstrap_gdtr_boot:
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| [b9e97fb] | 209 | .word gdtselector(GDT_ITEMS)
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| [c4b3e3e] | 210 | .long KA2PA(gdt)-BOOT_OFFSET
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