source: mainline/arch/amd64/src/boot/boot.S@ 6d7ffa65

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 6d7ffa65 was 8ccec3c1, checked in by Martin Decky <martin@…>, 20 years ago

remove deprecated pre-grub stuff on ia32
prepare for the same on amd64
  • Property mode set to 100644
File size: 6.7 KB
Line 
1#
2# Copyright (C) 2005 Ondrej Palkovsky
3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions
7# are met:
8#
9# - Redistributions of source code must retain the above copyright
10# notice, this list of conditions and the following disclaimer.
11# - Redistributions in binary form must reproduce the above copyright
12# notice, this list of conditions and the following disclaimer in the
13# documentation and/or other materials provided with the distribution.
14# - The name of the author may not be used to endorse or promote products
15# derived from this software without specific prior written permission.
16#
17# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27#
28
29#include <arch/mm/page.h>
30#include <arch/mm/ptl.h>
31#include <arch/pm.h>
32#include <arch/cpu.h>
33#include <arch/cpuid.h>
34#include <arch/boot/boot.h>
35
36#define START_STACK_64 0xffffffff80007c00
37
38#
39# This is where we require any SPARTAN-kernel-compatible boot loader
40# to pass control in real mode.
41#
42# Protected mode tables are statically initialised during compile
43# time. So we can just load the respective table registers and
44# switch to protected mode.
45#
46
47#define START_STACK (BOOTSTRAP_OFFSET-0x400)
48
49.section K_TEXT_START, "ax"
50.code16
51.global kernel_image_start
52kernel_image_start:
53 cli
54 xorw %ax,%ax
55 movw %ax,%ds
56 movw %ax,%es
57 movw %ax,%ss # initialize stack segment register
58 movl $(START_STACK), %esp # initialize stack pointer
59
60 call memmap_arch_init
61
62 movl $0x80000000, %eax
63 cpuid
64 cmp $0x80000000, %eax # any function > 80000000h?
65 jbe no_long_mode
66 movl $(AMD_CPUID_EXTENDED), %eax # Extended function code 80000001
67 cpuid
68 bt $29, %edx # Test if long mode is supported.
69 jnc no_long_mode
70
71 # Load gdtr, idtr
72 lgdt real_bootstrap_gdtr_boot
73
74 movl %cr0,%eax
75 orl $0x1,%eax
76 movl %eax,%cr0 # switch to protected mode
77
78 jmpl $gdtselector(KTEXT32_DES), $now_in_prot
79
80no_long_mode:
811:
82 jmp 1b
83
84.code32
85.align 4
86multiboot_header:
87 .long MULTIBOOT_HEADER_MAGIC
88 .long MULTIBOOT_HEADER_FLAGS
89 .long -(MULTIBOOT_HEADER_MAGIC + MULTIBOOT_HEADER_FLAGS) # checksum
90 .long multiboot_header + BOOT_OFFSET
91 .long unmapped_ktext_start + BOOT_OFFSET
92 .long 0
93 .long 0
94 .long multiboot_image_start + BOOT_OFFSET
95
96multiboot_image_start:
97 movl $START_STACK, %esp # initialize stack pointer
98 # FIXME TODO
99
100# Protected 32-bit. We want to reuse the code-seg descriptor,
101# the Default operand size must not be 1 when entering long mode
102now_in_prot:
103 # Set up stack & data descriptors
104 movw $gdtselector(KDATA_DES), %ax
105 movw %ax, %ds
106 movw %ax, %ss
107
108 movb $0xd1, %al # enable A20 using the keyboard controller
109 outb %al, $0x64
110 movb $0xdf, %al
111 outb %al, $0x60
112
113
114 # Enable 64-bit page transaltion entries - CR4.PAE = 1.
115 # Paging is not enabled until after long mode is enabled
116 movl %cr4, %eax
117 btsl $5, %eax
118 movl %eax, %cr4
119
120 # Set up paging tables
121 leal ptl_0, %eax
122 movl %eax, %cr3
123
124 # Enable long mode
125 movl $EFER_MSR_NUM, %ecx # EFER MSR number
126 rdmsr # Read EFER
127 btsl $AMD_LME_FLAG, %eax # Set LME=1
128 wrmsr # Write EFER
129
130 # Enable paging to activate long mode (set CR0.PG=1)
131 movl %cr0, %eax
132 btsl $31, %eax
133 movl %eax, %cr0
134
135 # At this point we are in compatibility mode
136 jmpl $gdtselector(KTEXT_DES), $start64
137
138.code64
139start64:
140 movq $(PA2KA(START_STACK)), %rsp
141
142 # Copy kernel to higher physical memory
143 movq $BOOTSTRAP_OFFSET, %rsi
144 movq $BOOTSTRAP_OFFSET + BOOT_OFFSET, %rdi
145 movq $_hardcoded_kernel_size, %rcx
146 cld
147 rep movsb
148
149 call main_bsp # never returns
1501:
151 jmp 1b
152
153.section K_DATA_START, "aw", @progbits
154.align 4096
155
156# Identical mapping of first 64MB and the same of -2GB -> 0
157.global ptl_2
158ptl_2:
159 .quad 0x0 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
160 .quad 0x200000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
161 .quad 0x400000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
162 .quad 0x600000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
163 .quad 0x800000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
164 .quad 0xa00000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
165 .quad 0xc00000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
166 .quad 0xe00000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
167 .quad 0x1000000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
168 .quad 0x1200000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
169 .quad 0x1400000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
170 .quad 0x1600000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
171 .quad 0x1800000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
172 .quad 0x1a00000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
173 .quad 0x1c00000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
174 .quad 0x1e00000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
175 .quad 0x2000000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
176 .quad 0x2200000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
177 .quad 0x2400000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
178 .quad 0x2600000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
179 .quad 0x2800000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
180 .quad 0x2a00000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
181 .quad 0x2c00000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
182 .quad 0x2e00000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
183 .quad 0x3000000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
184 .quad 0x3200000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
185 .quad 0x3400000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
186 .quad 0x3600000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
187 .quad 0x3800000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
188 .quad 0x3a00000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
189 .quad 0x3c00000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
190 .quad 0x3e00000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
191
192.align 4096
193.global ptl_1
194ptl_1:
195 .quad ptl_2 + (PTL_WRITABLE | PTL_PRESENT)
196 .fill 509,8,0
197 .quad ptl_2 + (PTL_WRITABLE | PTL_PRESENT)
198 .fill 1,8,0
199
200.align 4096
201.global ptl_0
202ptl_0:
203 .quad ptl_1 + (PTL_WRITABLE | PTL_PRESENT)
204 .fill 510,8,0
205 .quad ptl_1 + (PTL_WRITABLE | PTL_PRESENT)
206
207.global real_bootstrap_gdtr_boot
208real_bootstrap_gdtr_boot:
209 .word gdtselector(GDT_ITEMS)
210 .long KA2PA(gdt)-BOOT_OFFSET
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