ia64
[Memory management]


Files

file  as.h
file  asid.h
file  frame.h
file  memory_init.h
file  page.h
file  tlb.h
file  vhpt.h
file  as.c
file  frame.c
file  page.c
file  tlb.c
file  vhpt.c

Data Structures

union  tlb_entry

Defines

#define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH   0
#define KERNEL_ADDRESS_SPACE_START_ARCH   (unsigned long) 0xe000000000000000ULL
#define KERNEL_ADDRESS_SPACE_END_ARCH   (unsigned long) 0xffffffffffffffffULL
#define USER_ADDRESS_SPACE_START_ARCH   (unsigned long) 0x0000000000000000ULL
#define USER_ADDRESS_SPACE_END_ARCH   (unsigned long) 0xdfffffffffffffffULL
#define USTACK_ADDRESS_ARCH   0x0000000ff0000000ULL
#define RIDS_PER_ASID   7
#define RID_MAX   262143
#define RID_KERNEL   0
#define RID_INVALID   1
#define ASID2RID(asid, vrn)   (((asid)>RIDS_PER_ASID)?(((asid)*RIDS_PER_ASID)+(vrn)):(asid))
#define RID2ASID(rid)   ((rid)/RIDS_PER_ASID)
#define ASID_MAX_ARCH   (RID_MAX/RIDS_PER_ASID)
#define FRAME_WIDTH   14
#define FRAME_SIZE   (1<<FRAME_WIDTH)
#define get_memory_size()   (512*1024*1024)
#define PAGE_SIZE   FRAME_SIZE
#define PAGE_WIDTH   FRAME_WIDTH
#define tlb_arch_init()
#define tlb_print()
#define DTR_KERNEL   0
#define ITR_KERNEL   0
#define DTR_KSTACK1   1
#define DTR_KSTACK2   2
#define ROM_BASE   0xa0000
#define ROM_SIZE   (384*1024)

Typedefs

typedef __u16 asid_t
typedef __u32 rid_t
typedef tlb_entry tlb_entry_t

Functions

void as_arch_init (void)
void tc_mapping_insert (__address va, asid_t asid, tlb_entry_t entry, bool dtc)
void dtc_mapping_insert (__address va, asid_t asid, tlb_entry_t entry)
void itc_mapping_insert (__address va, asid_t asid, tlb_entry_t entry)
void tr_mapping_insert (__address va, asid_t asid, tlb_entry_t entry, bool dtr, index_t tr)
void dtr_mapping_insert (__address va, asid_t asid, tlb_entry_t entry, index_t tr)
void itr_mapping_insert (__address va, asid_t asid, tlb_entry_t entry, index_t tr)
void dtlb_kernel_mapping_insert (__address page, __address frame, bool dtr, index_t tr)
void dtr_purge (__address page, count_t width)
void dtc_pte_copy (pte_t *t)
void itc_pte_copy (pte_t *t)
void alternate_instruction_tlb_fault (__u64 vector, istate_t *istate)
void alternate_data_tlb_fault (__u64 vector, istate_t *istate)
void data_nested_tlb_fault (__u64 vector, istate_t *istate)
void data_dirty_bit_fault (__u64 vector, istate_t *istate)
void instruction_access_bit_fault (__u64 vector, istate_t *istate)
void data_access_bit_fault (__u64 vector, istate_t *istate)
void page_not_present (__u64 vector, istate_t *istate)
__address vhpt_set_up (void)
static vhpt_entry_t tlb_entry_t2vhpt_entry_t (tlb_entry_t tentry)
void vhpt_mapping_insert (__address va, asid_t asid, tlb_entry_t entry)
void vhpt_invalidate_all (void)
void vhpt_invalidate_asid (asid_t asid)
void as_install_arch (as_t *as)
void frame_arch_init (void)
static void set_environment (void)
void page_arch_init (void)
vhpt_entry_t * vhpt_hash (__address page, asid_t asid)
bool vhpt_compare (__address page, asid_t asid, vhpt_entry_t *v)
void vhpt_set_record (vhpt_entry_t *v, __address page, asid_t asid, __address frame, int flags)
void tlb_invalidate_all (void)
void tlb_invalidate_asid (asid_t asid)
void tlb_invalidate_pages (asid_t asid, __address page, count_t cnt)

Variables

tlb_entry packed
static vhpt_entry_t * vhpt_base

Define Documentation

#define ASID2RID asid,
vrn   )     (((asid)>RIDS_PER_ASID)?(((asid)*RIDS_PER_ASID)+(vrn)):(asid))
 

Definition at line 58 of file asid.h.

Referenced by as_install_arch(), set_environment(), tc_mapping_insert(), tlb_invalidate_pages(), tr_mapping_insert(), vhpt_compare(), vhpt_hash(), vhpt_mapping_insert(), and vhpt_set_record().

#define ASID_MAX_ARCH   (RID_MAX/RIDS_PER_ASID)
 

Definition at line 61 of file asid.h.

#define DTR_KERNEL   0
 

Data and instruction Translation Register indices.

Definition at line 48 of file tlb.h.

#define DTR_KSTACK1   1
 

Definition at line 50 of file tlb.h.

Referenced by before_thread_runs_arch().

#define DTR_KSTACK2   2
 

Definition at line 51 of file tlb.h.

Referenced by before_thread_runs_arch().

#define FRAME_SIZE   (1<<FRAME_WIDTH)
 

Definition at line 39 of file frame.h.

Referenced by anon_page_fault(), before_thread_runs_arch(), elf_frame_free(), elf_page_fault(), ht_mapping_insert(), phys_page_fault(), and sys_physmem_map().

#define FRAME_WIDTH   14
 

Definition at line 38 of file frame.h.

Referenced by ADDR2PFN(), frame_arch_init(), PFN2ADDR(), SIZE2FRAMES(), and vhpt_set_up().

 
#define get_memory_size  )     (512*1024*1024)
 

Definition at line 40 of file memory_init.h.

Referenced by main_bsp().

#define ITR_KERNEL   0
 

Definition at line 49 of file tlb.h.

#define KERNEL_ADDRESS_SPACE_END_ARCH   (unsigned long) 0xffffffffffffffffULL
 

Definition at line 41 of file as.h.

#define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH   0
 

Definition at line 38 of file as.h.

#define KERNEL_ADDRESS_SPACE_START_ARCH   (unsigned long) 0xe000000000000000ULL
 

Definition at line 40 of file as.h.

#define PAGE_SIZE   FRAME_SIZE
 

Definition at line 41 of file page.h.

Referenced by anon_page_fault(), anon_share(), as_area_create(), as_area_destroy(), as_area_resize(), as_area_share(), as_get_size(), badness(), before_thread_runs_arch(), check_area_conflicts(), comp_objects(), ddi_physmem_map(), elf_frame_free(), elf_page_fault(), elf_share(), find_area_and_lock(), ht_mapping_find(), ht_mapping_insert(), ht_mapping_remove(), klog_init(), load_segment(), main_bsp(), map_structure(), phys_page_fault(), slab_space_alloc(), sys_futex_sleep_timeout(), sys_futex_wakeup(), sys_io(), sys_physmem_map(), task_run_program(), tlb_invalidate_pages(), used_space_insert(), used_space_remove(), and userspace().

#define PAGE_WIDTH   FRAME_WIDTH
 

Definition at line 42 of file page.h.

Referenced by as_area_resize(), as_install_arch(), before_thread_runs_arch(), dtc_pte_copy(), dtlb_kernel_mapping_insert(), elf_frame_free(), elf_page_fault(), hash(), itc_pte_copy(), set_environment(), tlb_invalidate_pages(), and vhpt_set_record().

#define RID2ASID rid   )     ((rid)/RIDS_PER_ASID)
 

Definition at line 59 of file asid.h.

Referenced by alternate_data_tlb_fault().

#define RID_INVALID   1
 

Definition at line 56 of file asid.h.

#define RID_KERNEL   0
 

Definition at line 55 of file asid.h.

Referenced by set_environment().

#define RID_MAX   262143
 

Definition at line 54 of file asid.h.

#define RIDS_PER_ASID   7
 

Number of ia64 RIDs (Region Identifiers) per kernel ASID. Note that some architectures may support more bits, but those extra bits are not used by the kernel.

Definition at line 52 of file asid.h.

#define ROM_BASE   0xa0000
 

Definition at line 44 of file frame.c.

Referenced by frame_arch_init().

#define ROM_SIZE   (384*1024)
 

Definition at line 45 of file frame.c.

Referenced by frame_arch_init().

#define tlb_arch_init void   ) 
 

Definition at line 38 of file tlb.h.

Referenced by tlb_init().

#define tlb_print void   ) 
 

Definition at line 39 of file tlb.h.

Referenced by cmd_tlb().

#define USER_ADDRESS_SPACE_END_ARCH   (unsigned long) 0xdfffffffffffffffULL
 

Definition at line 43 of file as.h.

#define USER_ADDRESS_SPACE_START_ARCH   (unsigned long) 0x0000000000000000ULL
 

Definition at line 42 of file as.h.

#define USTACK_ADDRESS_ARCH   0x0000000ff0000000ULL
 

Definition at line 45 of file as.h.


Typedef Documentation

typedef __u16 asid_t
 

Definition at line 42 of file asid.h.

typedef __u32 rid_t
 

Definition at line 43 of file asid.h.

typedef union tlb_entry tlb_entry_t
 

Definition at line 77 of file tlb.h.


Function Documentation

void alternate_data_tlb_fault __u64  vector,
istate_t istate
 

Data TLB fault handler for faults with VHPT turned off.

Parameters:
vector Interruption vector.
istate Structure with saved interruption state.

Definition at line 484 of file tlb.c.

References AS, as_page_fault(), ASID_KERNEL, istate::cr_ifa, dtc_pte_copy(), dtlb_kernel_mapping_insert(), fault_if_from_uspace, page_mapping_find(), page_table_lock(), page_table_unlock(), panic, PF_ACCESS_READ, and RID2ASID.

Here is the call graph for this function:

void alternate_instruction_tlb_fault __u64  vector,
istate_t istate
 

Instruction TLB fault handler for faults with VHPT turned off.

Parameters:
vector Interruption vector.
istate Structure with saved interruption state.

Definition at line 447 of file tlb.c.

References AS, as_page_fault(), istate::cr_ifa, fault_if_from_uspace, itc_pte_copy(), page_mapping_find(), page_table_lock(), page_table_unlock(), panic, and PF_ACCESS_EXEC.

Here is the call graph for this function:

void as_arch_init void   ) 
 

Architecture dependent address space init.

Definition at line 46 of file as.c.

References as_ht_operations, as_operations, and asid_fifo_init().

Referenced by as_init().

Here is the call graph for this function:

void as_install_arch as_t as  ) 
 

Prepare registers for switching to another address space.

Parameters:
as Address space.

Definition at line 56 of file as.c.

References ASID2RID, ASID_INVALID, ASSERT, interrupts_disable(), PAGE_WIDTH, and spinlock_lock.

Referenced by as_switch().

Here is the call graph for this function:

void data_access_bit_fault __u64  vector,
istate_t istate
 

Data access bit fault handler.

Parameters:
vector Interruption vector.
istate Structure with saved interruption state.

Definition at line 617 of file tlb.c.

References AS, as_page_fault(), ASSERT, istate::cr_ifa, dtc_pte_copy(), fault_if_from_uspace, itc_pte_copy(), page_mapping_find(), page_table_lock(), page_table_unlock(), panic, and PF_ACCESS_READ.

Here is the call graph for this function:

void data_dirty_bit_fault __u64  vector,
istate_t istate
 

Data Dirty bit fault handler.

Parameters:
vector Interruption vector.
istate Structure with saved interruption state.

Definition at line 543 of file tlb.c.

References AS, as_page_fault(), ASSERT, istate::cr_ifa, dtc_pte_copy(), fault_if_from_uspace, page_mapping_find(), page_table_lock(), page_table_unlock(), panic, and PF_ACCESS_WRITE.

Here is the call graph for this function:

void data_nested_tlb_fault __u64  vector,
istate_t istate
 

Data nested TLB fault handler.

This fault should not occur.

Parameters:
vector Interruption vector.
istate Structure with saved interruption state.

Definition at line 533 of file tlb.c.

References panic.

void dtc_mapping_insert __address  va,
asid_t  asid,
tlb_entry_t  entry
 

Insert data into data translation cache.

Parameters:
va Virtual page address.
asid Address space identifier.
entry The rest of TLB entry as required by TLB insertion format.

Definition at line 204 of file tlb.c.

References tc_mapping_insert().

Referenced by dtc_pte_copy(), and dtlb_kernel_mapping_insert().

Here is the call graph for this function:

void dtc_pte_copy pte_t t  ) 
 

Copy content of PTE into data translation cache.

Parameters:
t PTE.

Definition at line 393 of file tlb.c.

References tlb_entry::a, tlb_entry::ar, tlb_entry::d, dtc_mapping_insert(), tlb_entry::ma, tlb_entry::p, PAGE_WIDTH, tlb_entry::pl, tlb_entry::ppn, tlb_entry::ps, vhpt_mapping_insert(), and tlb_entry::word.

Referenced by alternate_data_tlb_fault(), data_access_bit_fault(), data_dirty_bit_fault(), and page_not_present().

Here is the call graph for this function:

void dtlb_kernel_mapping_insert __address  page,
__address  frame,
bool  dtr,
index_t  tr
 

Insert data into DTLB.

Parameters:
page Virtual page address including VRN bits.
frame Physical frame address.
dtr If true, insert into data translation register, use data translation cache otherwise.
tr Translation register if dtr is true, ignored otherwise.

Definition at line 354 of file tlb.c.

References tlb_entry::a, tlb_entry::ar, ASID_KERNEL, tlb_entry::d, dtc_mapping_insert(), dtr_mapping_insert(), tlb_entry::ma, tlb_entry::p, PAGE_WIDTH, tlb_entry::pl, tlb_entry::ppn, tlb_entry::ps, and tlb_entry::word.

Referenced by alternate_data_tlb_fault(), and before_thread_runs_arch().

Here is the call graph for this function:

void dtr_mapping_insert __address  va,
asid_t  asid,
tlb_entry_t  entry,
index_t  tr
 

Insert data into data translation register.

Parameters:
va Virtual page address.
asid Address space identifier.
entry The rest of TLB entry as required by TLB insertion format.
tr Translation register.

Definition at line 290 of file tlb.c.

References tr_mapping_insert().

Referenced by dtlb_kernel_mapping_insert().

Here is the call graph for this function:

void dtr_purge __address  page,
count_t  width
 

Purge kernel entries from DTR.

Purge DTR entries used by the kernel.

Parameters:
page Virtual page address including VRN bits.
width Width of the purge in bits.

Definition at line 383 of file tlb.c.

Referenced by before_thread_runs_arch().

void frame_arch_init void   ) 
 

Definition at line 47 of file frame.c.

References ADDR2PFN(), config, frame_mark_unavailable(), FRAME_WIDTH, config_t::memory_size, ROM_BASE, ROM_SIZE, and zone_create().

Referenced by frame_init().

Here is the call graph for this function:

void instruction_access_bit_fault __u64  vector,
istate_t istate
 

Instruction access bit fault handler.

Parameters:
vector Interruption vector.
istate Structure with saved interruption state.

Definition at line 580 of file tlb.c.

References AS, as_page_fault(), ASSERT, istate::cr_ifa, fault_if_from_uspace, itc_pte_copy(), page_mapping_find(), page_table_lock(), page_table_unlock(), panic, and PF_ACCESS_EXEC.

Here is the call graph for this function:

void itc_mapping_insert __address  va,
asid_t  asid,
tlb_entry_t  entry
 

Insert data into instruction translation cache.

Parameters:
va Virtual page address.
asid Address space identifier.
entry The rest of TLB entry as required by TLB insertion format.

Definition at line 215 of file tlb.c.

References tc_mapping_insert().

Referenced by itc_pte_copy().

Here is the call graph for this function:

void itc_pte_copy pte_t t  ) 
 

Copy content of PTE into instruction translation cache.

Parameters:
t PTE.

Definition at line 419 of file tlb.c.

References tlb_entry::a, tlb_entry::ar, ASSERT, itc_mapping_insert(), tlb_entry::ma, tlb_entry::p, PAGE_WIDTH, tlb_entry::pl, tlb_entry::ppn, tlb_entry::ps, vhpt_mapping_insert(), and tlb_entry::word.

Referenced by alternate_instruction_tlb_fault(), data_access_bit_fault(), instruction_access_bit_fault(), and page_not_present().

Here is the call graph for this function:

void itr_mapping_insert __address  va,
asid_t  asid,
tlb_entry_t  entry,
index_t  tr
 

Insert data into instruction translation register.

Parameters:
va Virtual page address.
asid Address space identifier.
entry The rest of TLB entry as required by TLB insertion format.
tr Translation register.

Definition at line 278 of file tlb.c.

References tr_mapping_insert().

Here is the call graph for this function:

void page_arch_init void   ) 
 

Initialize ia64 virtual address translation subsystem.

Definition at line 55 of file page.c.

References ht_mapping_operations, pk_disable(), and set_environment().

Referenced by page_init().

Here is the call graph for this function:

void page_not_present __u64  vector,
istate_t istate
 

Page not present fault handler.

Parameters:
vector Interruption vector.
istate Structure with saved interruption state.

Definition at line 654 of file tlb.c.

References AS, as_page_fault(), ASSERT, istate::cr_ifa, dtc_pte_copy(), fault_if_from_uspace, itc_pte_copy(), page_mapping_find(), page_table_lock(), page_table_unlock(), panic, and PF_ACCESS_READ.

Here is the call graph for this function:

void set_environment void   )  [static]
 

Initialize VHPT and region registers.

Definition at line 63 of file page.c.

References ASID2RID, ASID_KERNEL, PAGE_WIDTH, RID_KERNEL, srlz_d, srlz_i, and vhpt_base.

Referenced by page_arch_init().

void tc_mapping_insert __address  va,
asid_t  asid,
tlb_entry_t  entry,
bool  dtc
 

Insert data into instruction or data translation cache.

Parameters:
va Virtual page address.
asid Address space identifier.
entry The rest of TLB entry as required by TLB insertion format.
dtc If true, insert into data translation cache, use instruction translation cache otherwise.

Definition at line 227 of file tlb.c.

References ASID2RID, PSR_IC_MASK, srlz_d, srlz_i, and tlb_entry::word.

Referenced by dtc_mapping_insert(), and itc_mapping_insert().

static vhpt_entry_t tlb_entry_t2vhpt_entry_t tlb_entry_t  tentry  )  [static]
 

Definition at line 44 of file vhpt.h.

References tlb_entry::word.

void tlb_invalidate_all void   ) 
 

Invalidate all TLB entries.

Definition at line 57 of file tlb.c.

References interrupts_disable(), PAL_PTCE_INFO_BASE, PAL_PTCE_INFO_COUNT1, PAL_PTCE_INFO_COUNT2, PAL_PTCE_INFO_STRIDE1, and PAL_PTCE_INFO_STRIDE2.

Referenced by tlb_invalidate_asid(), and tlb_shootdown_ipi_recv().

Here is the call graph for this function:

void tlb_invalidate_asid asid_t  asid  ) 
 

Invalidate entries belonging to an address space.

Parameters:
asid Address space identifier.

Definition at line 98 of file tlb.c.

References tlb_invalidate_all().

Referenced by asid_get(), and tlb_shootdown_ipi_recv().

Here is the call graph for this function:

void tlb_invalidate_pages asid_t  asid,
__address  page,
count_t  cnt
 

Definition at line 104 of file tlb.c.

References ASID2RID, PAGE_SIZE, PAGE_WIDTH, srlz_d, and srlz_i.

Referenced by tlb_shootdown_ipi_recv().

void tr_mapping_insert __address  va,
asid_t  asid,
tlb_entry_t  entry,
bool  dtr,
index_t  tr
 

Insert data into instruction or data translation register.

Parameters:
va Virtual page address.
asid Address space identifier.
entry The rest of TLB entry as required by TLB insertion format.
dtr If true, insert into data translation register, use instruction translation register otherwise.
tr Translation register.

Definition at line 303 of file tlb.c.

References ASID2RID, PSR_IC_MASK, srlz_d, srlz_i, and tlb_entry::word.

Referenced by dtr_mapping_insert(), and itr_mapping_insert().

bool vhpt_compare __address  page,
asid_t  asid,
vhpt_entry_t *  v
 

Compare ASID and VPN against PTE.

Interrupts must be disabled.

Parameters:
page Address of virtual page including VRN bits.
asid Address space identifier.
Returns:
True if page and asid match the page and asid of t, false otherwise.

Definition at line 175 of file page.c.

References ASID2RID, ASSERT, srlz_d, and srlz_i.

vhpt_entry_t* vhpt_hash __address  page,
asid_t  asid
 

Calculate address of collision chain from VPN and ASID.

Interrupts must be disabled.

Parameters:
page Address of virtual page including VRN bits.
asid Address space identifier.
Returns:
VHPT entry address.

Definition at line 131 of file page.c.

References ASID2RID, srlz_d, and srlz_i.

void vhpt_invalidate_all void   ) 
 

Definition at line 84 of file vhpt.c.

References memsetb(), and vhpt_base.

Referenced by vhpt_invalidate_asid(), and vhpt_set_up().

Here is the call graph for this function:

void vhpt_invalidate_asid asid_t  asid  ) 
 

Definition at line 89 of file vhpt.c.

References vhpt_invalidate_all().

Here is the call graph for this function:

void vhpt_mapping_insert __address  va,
asid_t  asid,
tlb_entry_t  entry
 

Definition at line 52 of file vhpt.c.

References ASID2RID, srlz_d, srlz_i, and tlb_entry::word.

Referenced by dtc_pte_copy(), and itc_pte_copy().

void vhpt_set_record vhpt_entry_t *  v,
__address  page,
asid_t  asid,
__address  frame,
int  flags
 

Set up one VHPT entry.

Parameters:
v VHPT entry to be set up.
page Virtual address of the page mapped by the entry.
asid Address space identifier of the address space to which page belongs.
frame Physical address of the frame to wich page is mapped.
flags Different flags for the mapping.

Definition at line 219 of file page.c.

References ASID2RID, ASSERT, PAGE_CACHEABLE, PAGE_EXEC, PAGE_USER, PAGE_WIDTH, PAGE_WRITE, srlz_d, and srlz_i.

__address vhpt_set_up void   ) 
 

Definition at line 43 of file vhpt.c.

References frame_alloc, FRAME_KA, FRAME_WIDTH, panic, PFN2ADDR(), vhpt_base, and vhpt_invalidate_all().

Here is the call graph for this function:


Variable Documentation

union tlb_entry packed
 

Portion of TLB insertion format data structure.

vhpt_entry_t* vhpt_base [static]
 

Definition at line 41 of file vhpt.c.

Referenced by set_environment(), vhpt_invalidate_all(), and vhpt_set_up().


Generated on Sun Jun 18 16:58:46 2006 for HelenOS Kernel (ia64) by  doxygen 1.4.6