Changeset f6b5593 in mainline for uspace/lib/libc/arch/ia64/include/atomic.h

Timestamp:

2009-09-21T11:53:03Z (15 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

4098e38

Parents:

2f636b6 (diff), c1618ed (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.

Message:

Merge mainline changes.

File:

• uspace/lib/libc/arch/ia64/include/atomic.h (modified) (2 diffs)

uspace/lib/libc/arch/ia64/include/atomic.h

@@ -27 +27 @@
  */
 
-/** @addtogroup libcia64        
+/** @addtogroup libcia64
  * @{
  */
@@ -36 +36 @@
 #define LIBC_ia64_ATOMIC_H_
 
-/** Atomic addition.
- *
- * @param val Atomic value.
- * @param imm Value to add.
- *
- * @return Value before addition.
- */
-static inline long atomic_add(atomic_t *val, int imm)
+static inline void atomic_inc(atomic_t *val)
 {
         long v;
+        
+        asm volatile (
+                "fetchadd8.rel %[v] = %[count], 1\n"
+                : [v] "=r" (v),
+                  [count] "+m" (val->count)
+        );
+}
 
-        asm volatile ("fetchadd8.rel %0 = %1, %2\n" : "=r" (v), "+m" (val->count) : "i" (imm));
- 
+static inline void atomic_dec(atomic_t *val)
+{
+        long v;
+        
+        asm volatile (
+                "fetchadd8.rel %[v] = %[count], -1\n"
+                : [v] "=r" (v),
+                  [count] "+m" (val->count)
+        );
+}
+
+static inline long atomic_preinc(atomic_t *val)
+{
+        long v;
+        
+        asm volatile (
+                "fetchadd8.rel %[v] = %[count], 1\n"
+                : [v] "=r" (v),
+                  [count] "+m" (val->count)
+        );
+        
+        return (v + 1);
+}
+
+static inline long atomic_predec(atomic_t *val)
+{
+        long v;
+        
+        asm volatile (
+                "fetchadd8.rel %[v] = %[count], -1\n"
+                : [v] "=r" (v),
+                  [count] "+m" (val->count)
+        );
+        
+        return (v - 1);
+}
+
+static inline long atomic_postinc(atomic_t *val)
+{
+        long v;
+        
+        asm volatile (
+                "fetchadd8.rel %[v] = %[count], 1\n"
+                : [v] "=r" (v),
+                  [count] "+m" (val->count)
+        );
+        
         return v;
 }
 
-static inline void atomic_inc(atomic_t *val) { atomic_add(val, 1); }
-static inline void atomic_dec(atomic_t *val) { atomic_add(val, -1); }
-
-static inline long atomic_preinc(atomic_t *val) { return atomic_add(val, 1) + 1; }
-static inline long atomic_predec(atomic_t *val) { return atomic_add(val, -1) - 1; }
-
-static inline long atomic_postinc(atomic_t *val) { return atomic_add(val, 1); }
-static inline long atomic_postdec(atomic_t *val) { return atomic_add(val, -1); }
+static inline long atomic_postdec(atomic_t *val)
+{
+        long v;
+        
+        asm volatile (
+                "fetchadd8.rel %[v] = %[count], -1\n"
+                : [v] "=r" (v),
+                  [count] "+m" (val->count)
+        );
+        
+        return v;
+}
 
 #endif