Changeset f1380b7 in mainline for uspace/lib/c/arch/ia32/_link.ld.in
- Timestamp:
- 2018-03-02T20:21:57Z (7 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 34e1206
- Parents:
- a35b458
- git-author:
- Jiří Zárevúcky <zarevucky.jiri@…> (2018-02-28 17:51:04)
- git-committer:
- Jiří Zárevúcky <zarevucky.jiri@…> (2018-03-02 20:21:57)
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
uspace/lib/c/arch/ia32/_link.ld.in
ra35b458 rf1380b7 25 25 . = 0x1000 + SIZEOF_HEADERS; 26 26 #endif 27 27 28 28 .init : { 29 29 *(.init); 30 30 } :text 31 31 32 32 .text : { 33 33 *(.text .text.*); 34 34 *(.rodata .rodata.*); 35 35 } :text 36 36 37 37 #if defined(SHLIB) || defined(DLEXE) 38 38 .rel.plt : { … … 46 46 *(.rel.*); 47 47 } :text 48 48 49 49 .plt : { 50 50 *(.plt); 51 51 } :text 52 52 53 53 .dynsym : { 54 54 *(.dynsym); 55 55 } :text 56 56 57 57 .dynstr : { 58 58 *(.dynstr); 59 59 } :text 60 60 61 61 .hash : { 62 62 *(.hash); 63 63 } :text 64 64 #endif 65 65 66 66 #if defined(LOADER) || defined(DLEXE) 67 67 .interp : { … … 69 69 } :interp :text 70 70 #endif 71 71 72 72 . = . + 0x1000; 73 73 74 74 #if defined(SHLIB) || defined(DLEXE) 75 75 .dynamic : { … … 77 77 } :data :dynamic 78 78 #endif 79 79 80 80 .data : { 81 81 *(.data); 82 82 } :data 83 83 84 84 #if defined(SHLIB) || defined(DLEXE) 85 85 .data.rel : { 86 86 *(.data.rel .data.rel.*); 87 87 } :data 88 88 89 89 .got : { 90 90 *(.got); 91 91 } :data 92 92 93 93 .got.plt : { 94 94 *(.got.plt); 95 95 } :data 96 96 #endif 97 97 98 98 .tdata : { 99 99 _tdata_start = .; … … 107 107 _tbss_end = .; 108 108 } :data :tls 109 109 110 110 _tls_alignment = MAX(ALIGNOF(.tdata), ALIGNOF(.tbss)); 111 111 112 112 .bss : { 113 113 *(.dynbss); … … 115 115 *(.bss); 116 116 } :data 117 117 118 118 #ifdef CONFIG_LINE_DEBUG 119 119 .comment 0 : { *(.comment); } :debug … … 128 128 .debug_str 0 : { *(.debug_str); } :debug 129 129 #endif 130 130 131 131 /DISCARD/ : { 132 132 *(*);
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