Changeset ef1a3a8 in mainline

Timestamp:

2017-10-29T11:53:45Z (7 years ago)

Author:

Petr Manek <petr.manek@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

a312d8f

Parents:

d33dc780

Message:

Added memory structure for stream TRB rings. Implemented their initialization. Fixed white space.

Location:

uspace/drv/bus/usb/xhci

Files:

• endpoint.c (modified) (4 diffs)
• endpoint.h (modified) (1 diff)
• hw_struct/context.h (modified) (1 diff)
• transfers.c (modified) (1 diff)

uspace/drv/bus/usb/xhci/endpoint.c

@@ -116 +116 @@
 static void initialize_primary_streams(xhci_hc_t *hc, xhci_endpoint_t *xhci_ep, unsigned count) {
         for (size_t index = 0; index < count; ++index) {
-                // Create trb ring for every primary stream
-                // Store it somewhere
-                // Set the dequeue pointer in stream context structure
-
-                // Set to linear stream array
-                XHCI_STREAM_SCT_SET(xhci_ep->primary_stream_ctx_array[index], 1);
+                xhci_stream_ctx_t *ctx = &xhci_ep->primary_stream_ctx_array[index];
+                xhci_trb_ring_t *ring = &xhci_ep->primary_stream_rings[index];
+
+                /* Init and register TRB ring for every primary stream */
+                xhci_trb_ring_init(ring);
+                XHCI_STREAM_DEQ_PTR_SET(*ctx, ring->dequeue);
+
+                /* Set to linear stream array */
+                XHCI_STREAM_SCT_SET(*ctx, 1);
         }
 }
@@ -151 +154 @@
         uint8_t max_psa_size = 2 << XHCI_REG_RD(hc->cap_regs, XHCI_CAP_MAX_PSA_SIZE);
         if (count > max_psa_size) {
-                // We don't support secondary stream arrays yet, so we just give up for this
+                // FIXME: We don't support secondary stream arrays yet, so we just give up for this
                 return ENOTSUP;
         }
@@ -169 +172 @@
                 }
 
+                xhci_ep->primary_stream_rings = calloc(count, sizeof(xhci_trb_ring_t));
+                if (!xhci_ep->primary_stream_rings) {
+                        free32(xhci_ep->primary_stream_ctx_array);
+                        return ENOMEM;
+                }
+
                 // FIXME: count should be rounded to nearest power of 2 for xHC, workaround for now
                 count = 1024;
@@ -182 +191 @@
                 return hc_add_endpoint(hc, dev->slot_id, xhci_endpoint_index(xhci_ep), &ep_ctx);
         }
-        // Complex stuff not supported yet
+        // FIXME: Complex stuff not supported yet
         return ENOTSUP;
 }

uspace/drv/bus/usb/xhci/endpoint.h

@@ -74 +74 @@
         xhci_transfer_t active_transfer;
 
-        /** Primary stream context array (or NULL if endpoint doesn't use streams) */
+        /** Primary stream context array (or NULL if endpoint doesn't use streams). */
         xhci_stream_ctx_t *primary_stream_ctx_array;
 
-        /** Size of the allocated primary stream context array. */
+        /** Primary stream ring array (or NULL if endpoint doesn't use streams). */
+        xhci_trb_ring_t *primary_stream_rings;
+
+        /** Size of the allocated primary stream context array (and ring array). */
         uint16_t primary_stream_ctx_array_size;
 

uspace/drv/bus/usb/xhci/hw_struct/context.h

@@ -169 +169 @@
 #define XHCI_STREAM_SCT_SET(ctx, val) \
         xhci_qword_set_bits(&(ctx).data[0], val, 3, 1)
+#define XHCI_STREAM_DEQ_PTR_SET(ctx, val) \
+        xhci_qword_set_bits(&(ctx).data[0], (val >> 4), 63, 4)
 } __attribute__((packed)) xhci_stream_ctx_t;
 

uspace/drv/bus/usb/xhci/transfers.c

@@ -324 +324 @@
         if (!xhci_ep->ring.segment_count) {
                 usb_log_error("Ring not initialized for endpoint " XHCI_EP_FMT,
-                    XHCI_EP_ARGS(*xhci_ep));
+                    XHCI_EP_ARGS(*xhci_ep));
                 return EINVAL;
         }