Changeset e7b7be3f in mainline for kernel/arch/mips32/include/barrier.h

Timestamp:

2007-01-22T13:10:08Z (18 years ago)

Author:

Martin Decky <martin@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

0f3fc9b

Parents:

62c63fc

Message:

asm volatile → asm volatile

File:

• kernel/arch/mips32/include/barrier.h (modified) (1 diff)

kernel/arch/mips32/include/barrier.h

@@ -39 +39 @@
  * TODO: implement true MIPS memory barriers for macros below.
  */
-#define CS_ENTER_BARRIER()      __asm__ volatile ("" ::: "memory")
-#define CS_LEAVE_BARRIER()      __asm__ volatile ("" ::: "memory")
+#define CS_ENTER_BARRIER()      asm volatile ("" ::: "memory")
+#define CS_LEAVE_BARRIER()      asm volatile ("" ::: "memory")
 
-#define memory_barrier()        __asm__ volatile ("" ::: "memory")
-#define read_barrier()          __asm__ volatile ("" ::: "memory")
-#define write_barrier()         __asm__ volatile ("" ::: "memory")
+#define memory_barrier()        asm volatile ("" ::: "memory")
+#define read_barrier()          asm volatile ("" ::: "memory")
+#define write_barrier()         asm volatile ("" ::: "memory")
 
 #endif