Changeset e7b7be3f in mainline for kernel/arch/ia32/include/asm.h

Timestamp:

2007-01-22T13:10:08Z (18 years ago)

Author:

Martin Decky <martin@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

0f3fc9b

Parents:

62c63fc

Message:

asm volatile → asm volatile

File:

• kernel/arch/ia32/include/asm.h (modified) (19 diffs)

kernel/arch/ia32/include/asm.h

@@ -58 +58 @@
  * Halt the current CPU until interrupt event.
  */
-static inline void cpu_halt(void) { __asm__("hlt\n"); };
-static inline void cpu_sleep(void) { __asm__("hlt\n"); };
+static inline void cpu_halt(void)
+{
+        asm("hlt\n");
+};
+
+static inline void cpu_sleep(void)
+{
+        asm("hlt\n");
+};
 
 #define GEN_READ_REG(reg) static inline unative_t read_ ##reg (void) \
     { \
         unative_t res; \
-        __asm__ volatile ("movl %%" #reg ", %0" : "=r" (res) ); \
+        asm volatile ("movl %%" #reg ", %0" : "=r" (res) ); \
         return res; \
     }
@@ -70 +77 @@
 #define GEN_WRITE_REG(reg) static inline void write_ ##reg (unative_t regn) \
     { \
-        __asm__ volatile ("movl %0, %%" #reg : : "r" (regn)); \
+        asm volatile ("movl %0, %%" #reg : : "r" (regn)); \
     }
 
@@ -99 +106 @@
  * @param val Value to write
  */
-static inline void outb(uint16_t port, uint8_t val) { __asm__ volatile ("outb %b0, %w1\n" : : "a" (val), "d" (port) ); }
+static inline void outb(uint16_t port, uint8_t val)
+{
+        asm volatile ("outb %b0, %w1\n" : : "a" (val), "d" (port) );
+}
 
 /** Word to port
@@ -108 +118 @@
  * @param val Value to write
  */
-static inline void outw(uint16_t port, uint16_t val) { __asm__ volatile ("outw %w0, %w1\n" : : "a" (val), "d" (port) ); }
+static inline void outw(uint16_t port, uint16_t val)
+{
+        asm volatile ("outw %w0, %w1\n" : : "a" (val), "d" (port) );
+}
 
 /** Double word to port
@@ -117 +130 @@
  * @param val Value to write
  */
-static inline void outl(uint16_t port, uint32_t val) { __asm__ volatile ("outl %l0, %w1\n" : : "a" (val), "d" (port) ); }
+static inline void outl(uint16_t port, uint32_t val)
+{
+        asm volatile ("outl %l0, %w1\n" : : "a" (val), "d" (port) );
+}
 
 /** Byte from port
@@ -126 +142 @@
  * @return Value read
  */
-static inline uint8_t inb(uint16_t port) { uint8_t val; __asm__ volatile ("inb %w1, %b0 \n" : "=a" (val) : "d" (port) ); return val; }
+static inline uint8_t inb(uint16_t port)
+{
+        uint8_t val;
+        
+        asm volatile ("inb %w1, %b0 \n" : "=a" (val) : "d" (port) );
+        return val;
+}
 
 /** Word from port
@@ -135 +157 @@
  * @return Value read
  */
-static inline uint16_t inw(uint16_t port) { uint16_t val; __asm__ volatile ("inw %w1, %w0 \n" : "=a" (val) : "d" (port) ); return val; }
+static inline uint16_t inw(uint16_t port)
+{
+        uint16_t val;
+        
+        asm volatile ("inw %w1, %w0 \n" : "=a" (val) : "d" (port) );
+        return val;
+}
 
 /** Double word from port
@@ -144 +172 @@
  * @return Value read
  */
-static inline uint32_t inl(uint16_t port) { uint32_t val; __asm__ volatile ("inl %w1, %l0 \n" : "=a" (val) : "d" (port) ); return val; }
+static inline uint32_t inl(uint16_t port)
+{
+        uint32_t val;
+        
+        asm volatile ("inl %w1, %l0 \n" : "=a" (val) : "d" (port) );
+        return val;
+}
 
 /** Enable interrupts.
@@ -156 +190 @@
 {
         ipl_t v;
-        __asm__ volatile (
+        asm volatile (
                 "pushf\n\t"
                 "popl %0\n\t"
@@ -175 +209 @@
 {
         ipl_t v;
-        __asm__ volatile (
+        asm volatile (
                 "pushf\n\t"
                 "popl %0\n\t"
@@ -192 +226 @@
 static inline void interrupts_restore(ipl_t ipl)
 {
-        __asm__ volatile (
+        asm volatile (
                 "pushl %0\n\t"
                 "popf\n"
@@ -206 +240 @@
 {
         ipl_t v;
-        __asm__ volatile (
+        asm volatile (
                 "pushf\n\t"
                 "popl %0\n"
@@ -224 +258 @@
         uintptr_t v;
         
-        __asm__ volatile ("andl %%esp, %0\n" : "=r" (v) : "0" (~(STACK_SIZE-1)));
+        asm volatile ("andl %%esp, %0\n" : "=r" (v) : "0" (~(STACK_SIZE-1)));
         
         return v;
@@ -234 +268 @@
         uintptr_t *ip;
 
-        __asm__ volatile (
+        asm volatile (
                 "mov %%eip, %0"
                 : "=r" (ip)
@@ -247 +281 @@
 static inline void invlpg(uintptr_t addr)
 {
-        __asm__ volatile ("invlpg %0\n" :: "m" (*(unative_t *)addr));
+        asm volatile ("invlpg %0\n" :: "m" (*(unative_t *)addr));
 }
 
@@ -256 +290 @@
 static inline void gdtr_load(ptr_16_32_t *gdtr_reg)
 {
-        __asm__ volatile ("lgdtl %0\n" : : "m" (*gdtr_reg));
+        asm volatile ("lgdtl %0\n" : : "m" (*gdtr_reg));
 }
 
@@ -265 +299 @@
 static inline void gdtr_store(ptr_16_32_t *gdtr_reg)
 {
-        __asm__ volatile ("sgdtl %0\n" : : "m" (*gdtr_reg));
+        asm volatile ("sgdtl %0\n" : : "m" (*gdtr_reg));
 }
 
@@ -274 +308 @@
 static inline void idtr_load(ptr_16_32_t *idtr_reg)
 {
-        __asm__ volatile ("lidtl %0\n" : : "m" (*idtr_reg));
+        asm volatile ("lidtl %0\n" : : "m" (*idtr_reg));
 }
 
@@ -283 +317 @@
 static inline void tr_load(uint16_t sel)
 {
-        __asm__ volatile ("ltr %0" : : "r" (sel));
+        asm volatile ("ltr %0" : : "r" (sel));
 }