Changeset e06ef614 in mainline
- Timestamp:
- 2010-11-02T20:10:30Z (14 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 49d819b4, efedee77
- Parents:
- 28f4adb (diff), e80329d6 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the(diff)
links above to see all the changes relative to each parent. - Files:
-
- 5 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/amd64/src/asm.S
r28f4adb re06ef614 95 95 memcpy_from_uspace_failover_address: 96 96 memcpy_to_uspace_failover_address: 97 xor q %rax, %rax /* return 0, failure */97 xorl %eax, %eax /* return 0, failure */ 98 98 ret 99 99 … … 143 143 144 144 set_efer_flag: 145 mov q $0xc0000080, %rcx145 movl $0xc0000080, %ecx 146 146 rdmsr 147 147 btsl %edi, %eax … … 150 150 151 151 read_efer_flag: 152 mov q $0xc0000080, %rcx152 movl $0xc0000080, %ecx 153 153 rdmsr 154 154 ret … … 243 243 * Stop stack traces here if we came from userspace. 244 244 */ 245 xor q %rdx, %rdx245 xorl %edx, %edx 246 246 cmpq $(GDT_SELECTOR(KTEXT_DES)), ISTATE_OFFSET_CS(%rsp) 247 247 cmovnzq %rdx, %rbp … … 386 386 movq ISTATE_OFFSET_RSP(%rsp), %rsp 387 387 388 /* 389 * Clear the rest of the scratch registers to prevent information leak. 390 * The 32-bit XOR on the low GPRs actually clears the entire 64-bit 391 * register and the instruction is shorter. 392 */ 393 xorl %edx, %edx 394 xorl %esi, %esi 395 xorl %edi, %edi 396 xorq %r8, %r8 397 xorq %r9, %r9 398 xorq %r10, %r10 399 388 400 sysretq 389 401 … … 413 425 movq %rdi, %rsi 414 426 movq $(PA2KA(0xb8000)), %rdi /* base of EGA text mode memory */ 415 xor q %rax, %rax427 xorl %eax, %eax 416 428 417 429 /* Read bits 8 - 15 of the cursor address */ … … 493 505 movq $(PA2KA(0xb80a0)), %rsi 494 506 movq $(PA2KA(0xb8000)), %rdi 495 mov q $480, %rcx507 movl $480, %ecx 496 508 rep movsq 497 509 498 510 /* Clear the 24th row */ 499 xor q %rax, %rax500 mov q $20, %rcx511 xorl %eax, %eax 512 movl $20, %ecx 501 513 rep stosq 502 514 -
kernel/arch/amd64/src/boot/boot.S
r28f4adb re06ef614 516 516 movq $(PA2KA(0xb80a0)), %rsi 517 517 movq $(PA2KA(0xb8000)), %rdi 518 mov q $480, %rcx518 movl $480, %ecx 519 519 rep movsq 520 520 521 521 /* Clear the 24th row */ 522 xor q %rax, %rax523 mov q $20, %rcx522 xorl %eax, %eax 523 movl $20, %ecx 524 524 rep stosq 525 525 -
kernel/arch/amd64/src/context.S
r28f4adb re06ef614 45 45 CONTEXT_SAVE_ARCH_CORE %rdi %rdx 46 46 47 xor q %rax, %rax # context_save returns 148 inc q %rax47 xorl %eax, %eax # context_save returns 1 48 incl %eax 49 49 ret 50 50 … … 60 60 movq %rdx, (%rsp) 61 61 62 xor q %rax, %rax # context_restore returns 062 xorl %eax, %eax # context_restore returns 0 63 63 ret -
uspace/lib/c/arch/amd64/src/entry.s
r28f4adb re06ef614 42 42 # 43 43 pushq $0 44 mov %rsp, %rbp44 movq %rsp, %rbp 45 45 46 46 # %rdi was deliberately chosen as the first argument is also in %rdi -
uspace/lib/c/arch/amd64/src/fibril.S
r28f4adb re06ef614 49 49 movq %rax, OFFSET_TLS(%rdi) 50 50 51 xor q %rax,%rax # context_save returns 152 inc q %rax51 xorl %eax, %eax # context_save returns 1 52 incl %eax 53 53 ret 54 54 … … 67 67 # Set thread local storage 68 68 movq OFFSET_TLS(%rdi), %rdi # Set arg1 to TLS addr 69 mov q $1, %rax # SYS_TLS_SET69 movl $1, %eax # SYS_TLS_SET 70 70 syscall 71 71 72 xor q %rax,%rax # context_restore returns 072 xorl %eax, %eax # context_restore returns 0 73 73 ret
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