Changeset de96d3b in mainline for kernel/arch/ia32/include/arch/mm/page.h
- Timestamp:
- 2024-01-03T16:54:15Z (16 months ago)
- Branches:
- master, topic/simplify-dev-export
- Children:
- 00e6288, 25e1490
- Parents:
- 7130754
- git-author:
- Jiří Zárevúcky <zarevucky.jiri@…> (2024-01-01 04:12:52)
- git-committer:
- Jiří Zárevúcky <zarevucky.jiri@…> (2024-01-03 16:54:15)
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/ia32/include/arch/mm/page.h
r7130754 rde96d3b 190 190 p->writeable << PAGE_WRITE_SHIFT | 191 191 1 << PAGE_EXEC_SHIFT | 192 p->global << PAGE_GLOBAL_SHIFT); 192 p->global << PAGE_GLOBAL_SHIFT | 193 p->page_write_through << PAGE_WRITE_COMBINE_SHIFT); 193 194 } 194 195 … … 197 198 pte_t *p = &pt[i]; 198 199 199 p->page_cache_disable = !(flags & PAGE_CACHEABLE);200 200 p->present = !(flags & PAGE_NOT_PRESENT); 201 201 p->uaccessible = (flags & PAGE_USER) != 0; 202 202 p->writeable = (flags & PAGE_WRITE) != 0; 203 203 p->global = (flags & PAGE_GLOBAL) != 0; 204 205 if (flags & PAGE_WRITE_COMBINE) { 206 /* We have mapped PCD+PWT bits to write-combine mode via PAT MSR. */ 207 /* (If PAT is unsupported, it will default to uncached.) */ 208 p->page_cache_disable = 1; 209 p->page_write_through = 1; 210 } else { 211 p->page_cache_disable = !(flags & PAGE_CACHEABLE); 212 p->page_write_through = 0; 213 } 204 214 205 215 /*
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