Changeset dc0b964 in mainline for kernel/arch/amd64/src

Timestamp:

2010-11-24T14:23:14Z (15 years ago)

Author:

Martin Decky <martin@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

85369b1, b89e1d3

Parents:

8b3bff5

Message:

• do not hardwire PRI??? formatting macros in the sources, use autotool to detect the correct values
• use autotool to detect correct values for integer literal macros (UINT32_C, etc.)
• start using portable UINT??_C style macros for integer constants

Location:

kernel/arch/amd64/src

Files:

• boot/memmap.c (modified) (1 diff)
• cpu/cpu.c (modified) (1 diff)
• debugger.c (modified) (2 diffs)
• pm.c (modified) (7 diffs)

kernel/arch/amd64/src/boot/memmap.c

@@ -35 +35 @@
 #include <arch/boot/memmap.h>
 
-uint8_t e820counter = 0xff;
+uint8_t e820counter = 0xffU;
 e820memmap_t e820table[MEMMAP_E820_MAX_RECORDS];
 

kernel/arch/amd64/src/cpu/cpu.c

@@ -47 +47 @@
  * Contains only non-MP-Specification specific SMP code.
  */
-#define AMD_CPUID_EBX  0x68747541
-#define AMD_CPUID_ECX  0x444d4163
-#define AMD_CPUID_EDX  0x69746e65
+#define AMD_CPUID_EBX  UINT32_C(0x68747541)
+#define AMD_CPUID_ECX  UINT32_C(0x444d4163)
+#define AMD_CPUID_EDX  UINT32_C(0x69746e65)
 
-#define INTEL_CPUID_EBX  0x756e6547
-#define INTEL_CPUID_ECX  0x6c65746e
-#define INTEL_CPUID_EDX  0x49656e69
-
+#define INTEL_CPUID_EBX  UINT32_C(0x756e6547)
+#define INTEL_CPUID_ECX  UINT32_C(0x6c65746e)
+#define INTEL_CPUID_EDX  UINT32_C(0x49656e69)
 
 enum vendor {

kernel/arch/amd64/src/debugger.c

@@ -126 +126 @@
         /* Disable breakpoint in DR7 */
         unative_t dr7 = read_dr7();
-        dr7 &= ~(0x2 << (curidx * 2));
+        dr7 &= ~(0x02U << (curidx * 2));
         
         /* Setup DR register */
@@ -147 +147 @@
                 
                 /* Set type to requested breakpoint & length*/
-                dr7 &= ~(0x3 << (16 + 4 * curidx));
-                dr7 &= ~(0x3 << (18 + 4 * curidx));
+                dr7 &= ~(0x03U << (16 + 4 * curidx));
+                dr7 &= ~(0x03U << (18 + 4 * curidx));
                 
                 if (!(flags & BKPOINT_INSTR)) {
 #ifdef __32_BITS__
-                        dr7 |= ((unative_t) 0x3) << (18 + 4 * curidx);
+                        dr7 |= ((unative_t) 0x03U) << (18 + 4 * curidx);
 #endif
                         
 #ifdef __64_BITS__
-                        dr7 |= ((unative_t) 0x2) << (18 + 4 * curidx);
+                        dr7 |= ((unative_t) 0x02U) << (18 + 4 * curidx);
 #endif
                         
                         if ((flags & BKPOINT_WRITE))
-                                dr7 |= ((unative_t) 0x1) << (16 + 4 * curidx);
+                                dr7 |= ((unative_t) 0x01U) << (16 + 4 * curidx);
                         else if ((flags & BKPOINT_READ_WRITE))
-                                dr7 |= ((unative_t) 0x3) << (16 + 4 * curidx);
+                                dr7 |= ((unative_t) 0x03U) << (16 + 4 * curidx);
                 }
                 
                 /* Enable global breakpoint */
-                dr7 |= 0x2 << (curidx * 2);
+                dr7 |= 0x02U << (curidx * 2);
                 
                 write_dr7(dr7);

kernel/arch/amd64/src/pm.c

@@ -28 +28 @@
  */
 
-/** @addtogroup amd64   
+/** @addtogroup amd64
  * @{
  */
@@ -52 +52 @@
         { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
         /* KTEXT descriptor */
-        { .limit_0_15  = 0xffff, 
-          .base_0_15   = 0, 
-          .base_16_23  = 0, 
-          .access      = AR_PRESENT | AR_CODE | DPL_KERNEL | AR_READABLE, 
-          .limit_16_19 = 0xf, 
-          .available   = 0, 
-          .longmode    = 1, 
+        { .limit_0_15  = 0xffffU,
+          .base_0_15   = 0,
+          .base_16_23  = 0,
+          .access      = AR_PRESENT | AR_CODE | DPL_KERNEL | AR_READABLE,
+          .limit_16_19 = 0x0fU,
+          .available   = 0,
+          .longmode    = 1,
           .special     = 0,
-          .granularity = 1, 
+          .granularity = 1,
           .base_24_31  = 0 },
         /* KDATA descriptor */
-        { .limit_0_15  = 0xffff, 
-          .base_0_15   = 0, 
-          .base_16_23  = 0, 
-          .access      = AR_PRESENT | AR_DATA | AR_WRITABLE | DPL_KERNEL, 
-          .limit_16_19 = 0xf, 
-          .available   = 0, 
-          .longmode    = 0, 
-          .special     = 0, 
-          .granularity = 1, 
+        { .limit_0_15  = 0xffffU,
+          .base_0_15   = 0,
+          .base_16_23  = 0,
+          .access      = AR_PRESENT | AR_DATA | AR_WRITABLE | DPL_KERNEL,
+          .limit_16_19 = 0x0fU,
+          .available   = 0,
+          .longmode    = 0,
+          .special     = 0,
+          .granularity = 1,
           .base_24_31  = 0 },
         /* UDATA descriptor */
-        { .limit_0_15  = 0xffff, 
-          .base_0_15   = 0, 
-          .base_16_23  = 0, 
-          .access      = AR_PRESENT | AR_DATA | AR_WRITABLE | DPL_USER, 
-          .limit_16_19 = 0xf, 
-          .available   = 0, 
-          .longmode    = 0, 
-          .special     = 1, 
-          .granularity = 1, 
+        { .limit_0_15  = 0xffffU,
+          .base_0_15   = 0,
+          .base_16_23  = 0,
+          .access      = AR_PRESENT | AR_DATA | AR_WRITABLE | DPL_USER,
+          .limit_16_19 = 0x0fU,
+          .available   = 0,
+          .longmode    = 0,
+          .special     = 1,
+          .granularity = 1,
           .base_24_31  = 0 },
         /* UTEXT descriptor */
-        { .limit_0_15  = 0xffff, 
-          .base_0_15   = 0, 
-          .base_16_23  = 0, 
-          .access      = AR_PRESENT | AR_CODE | DPL_USER, 
-          .limit_16_19 = 0xf, 
-          .available   = 0, 
-          .longmode    = 1, 
-          .special     = 0, 
-          .granularity = 1, 
+        { .limit_0_15  = 0xffffU,
+          .base_0_15   = 0,
+          .base_16_23  = 0,
+          .access      = AR_PRESENT | AR_CODE | DPL_USER,
+          .limit_16_19 = 0x0fU,
+          .available   = 0,
+          .longmode    = 1,
+          .special     = 0,
+          .granularity = 1,
           .base_24_31  = 0 },
         /* KTEXT 32-bit protected, for protected mode before long mode */
-        { .limit_0_15  = 0xffff, 
-          .base_0_15   = 0, 
-          .base_16_23  = 0, 
-          .access      = AR_PRESENT | AR_CODE | DPL_KERNEL | AR_READABLE, 
-          .limit_16_19 = 0xf, 
-          .available   = 0, 
-          .longmode    = 0, 
+        { .limit_0_15  = 0xffffU,
+          .base_0_15   = 0,
+          .base_16_23  = 0,
+          .access      = AR_PRESENT | AR_CODE | DPL_KERNEL | AR_READABLE,
+          .limit_16_19 = 0x0fU,
+          .available   = 0,
+          .longmode    = 0,
           .special     = 1,
-          .granularity = 1, 
+          .granularity = 1,
           .base_24_31  = 0 },
         /* TSS descriptor - set up will be completed later,
@@ -111 +111 @@
         { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
         /* VESA Init descriptor */
-#ifdef CONFIG_FB        
-        { 0xffff, 0, VESA_INIT_SEGMENT >> 12, AR_PRESENT | AR_CODE | DPL_KERNEL,
-          0xf, 0, 0, 0, 0, 0
+#ifdef CONFIG_FB
+        {
+                0xffff, 0, VESA_INIT_SEGMENT >> 12, AR_PRESENT | AR_CODE | DPL_KERNEL,
+                    0xf, 0, 0, 0, 0, 0
         }
 #endif
@@ -129 +130 @@
 {
         tss_descriptor_t *td = (tss_descriptor_t *) d;
-
-        td->base_0_15 = base & 0xffff;
-        td->base_16_23 = ((base) >> 16) & 0xff;
-        td->base_24_31 = ((base) >> 24) & 0xff;
+        
+        td->base_0_15 = base & 0xffffU;
+        td->base_16_23 = ((base) >> 16) & 0xffU;
+        td->base_24_31 = ((base) >> 24) & 0xffU;
         td->base_32_63 = ((base) >> 32);
 }
@@ -140 +141 @@
         tss_descriptor_t *td = (tss_descriptor_t *) d;
         
-        td->limit_0_15 = limit & 0xffff;
-        td->limit_16_19 = (limit >> 16) & 0xf;
+        td->limit_0_15 = limit & 0xffffU;
+        td->limit_16_19 = (limit >> 16) & 0x0fU;
 }
 
@@ -149 +150 @@
          * Offset is a linear address.
          */
-        d->offset_0_15 = offset & 0xffff;
-        d->offset_16_31 = offset >> 16 & 0xffff;
+        d->offset_0_15 = offset & 0xffffU;
+        d->offset_16_31 = (offset >> 16) & 0xffffU;
         d->offset_32_63 = offset >> 32;
 }
@@ -165 +166 @@
 {
         idescriptor_t *d;
-        int i;
-
+        unsigned int i;
+        
         for (i = 0; i < IDT_ITEMS; i++) {
                 d = &idt[i];
-
+                
                 d->unused = 0;
                 d->selector = GDT_SELECTOR(KTEXT_DES);
-
+                
                 d->present = 1;
-                d->type = AR_INTERRUPT; /* masking interrupt */
+                d->type = AR_INTERRUPT;  /* masking interrupt */
         }
-
+        
         d = &idt[0];
         idt_setoffset(d++, (uintptr_t) &int_0);