Changeset dc0b964 in mainline


Ignore:
Timestamp:
2010-11-24T14:23:14Z (14 years ago)
Author:
Martin Decky <martin@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
85369b1, b89e1d3
Parents:
8b3bff5
Message:
  • do not hardwire PRI??? formatting macros in the sources, use autotool to detect the correct values
  • use autotool to detect correct values for integer literal macros (UINT32_C, etc.)
  • start using portable UINT??_C style macros for integer constants
Files:
53 edited

Legend:

Unmodified
Added
Removed
  • kernel/arch/abs32le/include/istate.h

    r8b3bff5 rdc0b964  
    3737
    3838#ifdef KERNEL
     39
    3940#include <typedefs.h>
    4041#include <verify.h>
    4142#include <trace.h>
    42 #else
     43
     44#else /* KERNEL */
     45
    4346#include <sys/types.h>
     47
    4448#define NO_TRACE
    4549#define REQUIRES_EXTENT_MUTABLE(arg)
    4650#define WRITES(arg)
    47 #endif
     51
     52#endif /* KERNEL */
    4853
    4954/*
     
    6368           context originated from user space. */
    6469       
    65         return !(istate->ip & 0x80000000);
     70        return !(istate->ip & UINT32_C(0x80000000));
    6671}
    6772
  • kernel/arch/abs32le/include/mm/as.h

    r8b3bff5 rdc0b964  
    3838#define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH  0
    3939
    40 #define KERNEL_ADDRESS_SPACE_START_ARCH  ((unsigned long) 0x80000000)
    41 #define KERNEL_ADDRESS_SPACE_END_ARCH    ((unsigned long) 0xffffffff)
    42 #define USER_ADDRESS_SPACE_START_ARCH    ((unsigned long) 0x00000000)
    43 #define USER_ADDRESS_SPACE_END_ARCH      ((unsigned long) 0x7fffffff)
     40#define KERNEL_ADDRESS_SPACE_START_ARCH  UINT32_C(0x80000000)
     41#define KERNEL_ADDRESS_SPACE_END_ARCH    UINT32_C(0xffffffff)
     42#define USER_ADDRESS_SPACE_START_ARCH    UINT32_C(0x00000000)
     43#define USER_ADDRESS_SPACE_END_ARCH      UINT32_C(0x7fffffff)
    4444
    4545#define USTACK_ADDRESS_ARCH  (USER_ADDRESS_SPACE_END_ARCH - (PAGE_SIZE - 1))
  • kernel/arch/abs32le/include/mm/page.h

    r8b3bff5 rdc0b964  
    4444#ifdef KERNEL
    4545
    46 #define KA2PA(x)  (((uintptr_t) (x)) - 0x80000000)
    47 #define PA2KA(x)  (((uintptr_t) (x)) + 0x80000000)
     46#define KA2PA(x)  (((uintptr_t) (x)) - UINT32_C(0x80000000))
     47#define PA2KA(x)  (((uintptr_t) (x)) + UINT32_C(0x80000000))
    4848
    4949/*
     
    6565
    6666/* Macros calculating indices for each level. */
    67 #define PTL0_INDEX_ARCH(vaddr)  (((vaddr) >> 22) & 0x3ff)
     67#define PTL0_INDEX_ARCH(vaddr)  (((vaddr) >> 22) & 0x3ffU)
    6868#define PTL1_INDEX_ARCH(vaddr)  0
    6969#define PTL2_INDEX_ARCH(vaddr)  0
    70 #define PTL3_INDEX_ARCH(vaddr)  (((vaddr) >> 12) & 0x3ff)
     70#define PTL3_INDEX_ARCH(vaddr)  (((vaddr) >> 12) & 0x3ffU)
    7171
    7272/* Get PTE address accessors for each level. */
  • kernel/arch/abs32le/include/types.h

    r8b3bff5 rdc0b964  
    5353} fncptr_t;
    5454
    55 #define PRIp  "x"  /**< Format for uintptr_t. */
    56 #define PRIs  "u"  /**< Format for size_t. */
    57 
    58 #define PRId8   "d"    /**< Format for int8_t. */
    59 #define PRId16  "d"    /**< Format for int16_t. */
    60 #define PRId32  "d"    /**< Format for int32_t. */
    61 #define PRId64  "lld"  /**< Format for int64_t. */
    62 #define PRIdn   "d"    /**< Format for native_t. */
    63 
    64 #define PRIu8   "u"    /**< Format for uint8_t. */
    65 #define PRIu16  "u"    /**< Format for uint16_t. */
    66 #define PRIu32  "u"    /**< Format for uint32_t. */
    67 #define PRIu64  "llu"  /**< Format for uint64_t. */
    68 #define PRIun   "u"    /**< Format for unative_t. */
    69 
    70 #define PRIx8   "x"    /**< Format for hexadecimal (u)int8_t. */
    71 #define PRIx16  "x"    /**< Format for hexadecimal (u)int16_t. */
    72 #define PRIx32  "x"    /**< Format for hexadecimal (u)uint32_t. */
    73 #define PRIx64  "llx"  /**< Format for hexadecimal (u)int64_t. */
    74 #define PRIxn   "x"    /**< Format for hexadecimal (u)native_t. */
     55#define PRIp   PRIx32  /**< Format for uintptr_t. */
     56#define PRIs   PRIu32  /**< Format for size_t. */
     57#define PRIdn  PRId32  /**< Format for native_t. */
     58#define PRIun  PRIu32  /**< Format for unative_t. */
     59#define PRIxn  PRIx32  /**< Format for hexadecimal unative_t. */
    7560
    7661#endif
  • kernel/arch/amd64/include/context.h

    r8b3bff5 rdc0b964  
    2727 */
    2828
    29 /** @addtogroup amd64   
     29/** @addtogroup amd64
    3030 * @{
    3131 */
     
    4444 * panic sooner or later
    4545 */
    46 #define SP_DELTA     16
     46#define SP_DELTA  16
    4747
    4848#define context_set(c, _pc, stack, size) \
  • kernel/arch/amd64/include/context_offset.h

    r8b3bff5 rdc0b964  
    3030#define KERN_amd64_CONTEXT_OFFSET_H_
    3131
    32 #define OFFSET_SP  0x0
    33 #define OFFSET_PC  0x8
    34 #define OFFSET_RBX 0x10
    35 #define OFFSET_RBP 0x18
    36 #define OFFSET_R12 0x20
    37 #define OFFSET_R13 0x28
    38 #define OFFSET_R14 0x30
    39 #define OFFSET_R15 0x38
     32#define OFFSET_SP   0x00
     33#define OFFSET_PC   0x08
     34#define OFFSET_RBX  0x10
     35#define OFFSET_RBP  0x18
     36#define OFFSET_R12  0x20
     37#define OFFSET_R13  0x28
     38#define OFFSET_R14  0x30
     39#define OFFSET_R15  0x38
    4040
    4141#ifdef KERNEL
    42 # define OFFSET_IPL 0x40
     42        #define OFFSET_IPL 0x40
    4343#else
    44 # define OFFSET_TLS 0x40
     44        #define OFFSET_TLS 0x40
    4545#endif
    4646
    4747#ifdef __ASM__
    4848
    49 # ctx: address of the structure with saved context 
     49# ctx: address of the structure with saved context
    5050# pc: return address
    5151.macro CONTEXT_SAVE_ARCH_CORE ctx:req pc:req
     
    6161.endm
    6262
    63 # ctx: address of the structure with saved context 
     63# ctx: address of the structure with saved context
    6464.macro CONTEXT_RESTORE_ARCH_CORE ctx:req pc:req
    6565        movq OFFSET_R15(\ctx), %r15
     
    6868        movq OFFSET_R12(\ctx), %r12
    6969        movq OFFSET_RBP(\ctx), %rbp
    70         movq OFFSET_RBX(\ctx), %rbx     
     70        movq OFFSET_RBX(\ctx), %rbx
    7171       
    7272        movq OFFSET_SP(\ctx), %rsp   # ctx->sp -> %rsp
  • kernel/arch/amd64/include/cpu.h

    r8b3bff5 rdc0b964  
    3636#define KERN_amd64_CPU_H_
    3737
    38 #define RFLAGS_CF       (1 << 0)
    39 #define RFLAGS_PF       (1 << 2)
    40 #define RFLAGS_AF       (1 << 4)
    41 #define RFLAGS_ZF       (1 << 6)
    42 #define RFLAGS_SF       (1 << 7)
    43 #define RFLAGS_TF       (1 << 8)
    44 #define RFLAGS_IF       (1 << 9)
    45 #define RFLAGS_DF       (1 << 10)
    46 #define RFLAGS_OF       (1 << 11)
    47 #define RFLAGS_NT       (1 << 14)
    48 #define RFLAGS_RF       (1 << 16)
     38#define RFLAGS_CF  (1 << 0)
     39#define RFLAGS_PF  (1 << 2)
     40#define RFLAGS_AF  (1 << 4)
     41#define RFLAGS_ZF  (1 << 6)
     42#define RFLAGS_SF  (1 << 7)
     43#define RFLAGS_TF  (1 << 8)
     44#define RFLAGS_IF  (1 << 9)
     45#define RFLAGS_DF  (1 << 10)
     46#define RFLAGS_OF  (1 << 11)
     47#define RFLAGS_NT  (1 << 14)
     48#define RFLAGS_RF  (1 << 16)
    4949
    5050#define EFER_MSR_NUM    0xc0000080
  • kernel/arch/amd64/include/debugger.h

    r8b3bff5 rdc0b964  
    4141
    4242/* Flags that are passed to breakpoint_add function */
    43 #define BKPOINT_INSTR       0x1
    44 #define BKPOINT_WRITE       0x2
    45 #define BKPOINT_READ_WRITE  0x4
     43#define BKPOINT_INSTR       0x1U
     44#define BKPOINT_WRITE       0x2U
     45#define BKPOINT_READ_WRITE  0x4U
    4646
    47 #define BKPOINT_CHECK_ZERO  0x8
     47#define BKPOINT_CHECK_ZERO  0x8U
    4848
    4949
  • kernel/arch/amd64/include/istate.h

    r8b3bff5 rdc0b964  
    3737
    3838#ifdef KERNEL
     39
    3940#include <typedefs.h>
    4041#include <trace.h>
    41 #else
     42
     43#else /* KERNEL */
     44
    4245#include <sys/types.h>
     46
    4347#define NO_TRACE
    44 #endif
     48
     49#endif /* KERNEL */
    4550
    4651/** This is passed to interrupt handlers */
     
    6166        uint64_t r14;
    6267        uint64_t r15;
    63         uint64_t alignment;     /* align rbp_frame on multiple of 16 */
    64         uint64_t rbp_frame;     /* imitation of frame pointer linkage */
    65         uint64_t rip_frame;     /* imitation of return address linkage */
    66         uint64_t error_word;    /* real or fake error word */
     68        uint64_t alignment;   /* align rbp_frame on multiple of 16 */
     69        uint64_t rbp_frame;   /* imitation of frame pointer linkage */
     70        uint64_t rip_frame;   /* imitation of return address linkage */
     71        uint64_t error_word;  /* real or fake error word */
    6772        uint64_t rip;
    6873        uint64_t cs;
    6974        uint64_t rflags;
    70         uint64_t rsp;           /* only if istate_t is from uspace */
    71         uint64_t ss;            /* only if istate_t is from uspace */
     75        uint64_t rsp;         /* only if istate_t is from uspace */
     76        uint64_t ss;          /* only if istate_t is from uspace */
    7277} istate_t;
    7378
     
    7580NO_TRACE static inline int istate_from_uspace(istate_t *istate)
    7681{
    77         return !(istate->rip & 0x8000000000000000);
     82        return !(istate->rip & UINT64_C(0x8000000000000000));
    7883}
    7984
  • kernel/arch/amd64/include/mm/as.h

    r8b3bff5 rdc0b964  
    3636#define KERN_amd64_AS_H_
    3737
    38 #define ADDRESS_SPACE_HOLE_START        0x0000800000000000ULL
    39 #define ADDRESS_SPACE_HOLE_END          0xffff7fffffffffffULL
     38#define ADDRESS_SPACE_HOLE_START  UINT64_C(0x0000800000000000)
     39#define ADDRESS_SPACE_HOLE_END    UINT64_C(0xffff7fffffffffff)
    4040
    4141#define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH  0
    4242
    43 #define KERNEL_ADDRESS_SPACE_START_ARCH 0xffff800000000000ULL
    44 #define KERNEL_ADDRESS_SPACE_END_ARCH   0xffffffffffffffffULL
     43#define KERNEL_ADDRESS_SPACE_START_ARCH  UINT64_C(0xffff800000000000)
     44#define KERNEL_ADDRESS_SPACE_END_ARCH    UINT64_C(0xffffffffffffffff)
    4545
    46 #define USER_ADDRESS_SPACE_START_ARCH   0x0000000000000000ULL
    47 #define USER_ADDRESS_SPACE_END_ARCH     0x00007fffffffffffULL
     46#define USER_ADDRESS_SPACE_START_ARCH  UINT64_C(0x0000000000000000)
     47#define USER_ADDRESS_SPACE_END_ARCH    UINT64_C(0x00007fffffffffff)
    4848
    4949#define USTACK_ADDRESS_ARCH  (USER_ADDRESS_SPACE_END_ARCH - (PAGE_SIZE - 1))
  • kernel/arch/amd64/include/mm/page.h

    r8b3bff5 rdc0b964  
    5555#ifndef __ASM__
    5656
    57 #define KA2PA(x)  (((uintptr_t) (x)) - 0xffff800000000000)
    58 #define PA2KA(x)  (((uintptr_t) (x)) + 0xffff800000000000)
     57#define KA2PA(x)  (((uintptr_t) (x)) - UINT64_C(0xffff800000000000))
     58#define PA2KA(x)  (((uintptr_t) (x)) + UINT64_C(0xffff800000000000))
    5959
    6060#else /* __ASM__ */
     
    7878
    7979/* Macros calculating indices into page tables in each level. */
    80 #define PTL0_INDEX_ARCH(vaddr)  (((vaddr) >> 39) & 0x1ff)
    81 #define PTL1_INDEX_ARCH(vaddr)  (((vaddr) >> 30) & 0x1ff)
    82 #define PTL2_INDEX_ARCH(vaddr)  (((vaddr) >> 21) & 0x1ff)
    83 #define PTL3_INDEX_ARCH(vaddr)  (((vaddr) >> 12) & 0x1ff)
     80#define PTL0_INDEX_ARCH(vaddr)  (((vaddr) >> 39) & 0x1ffU)
     81#define PTL1_INDEX_ARCH(vaddr)  (((vaddr) >> 30) & 0x1ffU)
     82#define PTL2_INDEX_ARCH(vaddr)  (((vaddr) >> 21) & 0x1ffU)
     83#define PTL3_INDEX_ARCH(vaddr)  (((vaddr) >> 12) & 0x1ffU)
    8484
    8585/* Get PTE address accessors for each level. */
     
    205205        pte_t *p = &pt[i];
    206206       
    207         p->addr_12_31 = (a >> 12) & 0xfffff;
     207        p->addr_12_31 = (a >> 12) & UINT32_C(0xfffff);
    208208        p->addr_32_51 = a >> 32;
    209209}
  • kernel/arch/amd64/include/pm.h

    r8b3bff5 rdc0b964  
    7575#define AR_WRITABLE   (1 << 1)
    7676#define AR_READABLE   (1 << 1)
    77 #define AR_TSS        (0x09)
    78 #define AR_INTERRUPT  (0x0e)
    79 #define AR_TRAP       (0x0f)
     77#define AR_TSS        (0x09U)
     78#define AR_INTERRUPT  (0x0eU)
     79#define AR_TRAP       (0x0fU)
    8080
    8181#define DPL_KERNEL  (PL_KERNEL << 5)
  • kernel/arch/amd64/include/types.h

    r8b3bff5 rdc0b964  
    5050} fncptr_t;
    5151
    52 /* Formats for uintptr_t, size_t */
    53 #define PRIp  "llx"
    54 #define PRIs  "llu"
    55 
    56 /* Formats for (u)int8_t, (u)int16_t, (u)int32_t, (u)int64_t and (u)native_t */
    57 #define PRId8   "d"
    58 #define PRId16  "d"
    59 #define PRId32  "d"
    60 #define PRId64  "lld"
    61 #define PRIdn   "lld"
    62 
    63 #define PRIu8   "u"
    64 #define PRIu16  "u"
    65 #define PRIu32  "u"
    66 #define PRIu64  "llu"
    67 #define PRIun   "llu"
    68 
    69 #define PRIx8   "x"
    70 #define PRIx16  "x"
    71 #define PRIx32  "x"
    72 #define PRIx64  "llx"
    73 #define PRIxn   "llx"
     52#define PRIp   PRIx64  /**< Format for uintptr_t. */
     53#define PRIs   PRIu64  /**< Format for size_t. */
     54#define PRIdn  PRId64  /**< Format for native_t. */
     55#define PRIun  PRIu64  /**< Format for unative_t. */
     56#define PRIxn  PRIx64  /**< Format for hexadecimal unative_t. */
    7457
    7558#endif
  • kernel/arch/amd64/src/boot/memmap.c

    r8b3bff5 rdc0b964  
    3535#include <arch/boot/memmap.h>
    3636
    37 uint8_t e820counter = 0xff;
     37uint8_t e820counter = 0xffU;
    3838e820memmap_t e820table[MEMMAP_E820_MAX_RECORDS];
    3939
  • kernel/arch/amd64/src/cpu/cpu.c

    r8b3bff5 rdc0b964  
    4747 * Contains only non-MP-Specification specific SMP code.
    4848 */
    49 #define AMD_CPUID_EBX  0x68747541
    50 #define AMD_CPUID_ECX  0x444d4163
    51 #define AMD_CPUID_EDX  0x69746e65
     49#define AMD_CPUID_EBX  UINT32_C(0x68747541)
     50#define AMD_CPUID_ECX  UINT32_C(0x444d4163)
     51#define AMD_CPUID_EDX  UINT32_C(0x69746e65)
    5252
    53 #define INTEL_CPUID_EBX  0x756e6547
    54 #define INTEL_CPUID_ECX  0x6c65746e
    55 #define INTEL_CPUID_EDX  0x49656e69
    56 
     53#define INTEL_CPUID_EBX  UINT32_C(0x756e6547)
     54#define INTEL_CPUID_ECX  UINT32_C(0x6c65746e)
     55#define INTEL_CPUID_EDX  UINT32_C(0x49656e69)
    5756
    5857enum vendor {
  • kernel/arch/amd64/src/debugger.c

    r8b3bff5 rdc0b964  
    126126        /* Disable breakpoint in DR7 */
    127127        unative_t dr7 = read_dr7();
    128         dr7 &= ~(0x2 << (curidx * 2));
     128        dr7 &= ~(0x02U << (curidx * 2));
    129129       
    130130        /* Setup DR register */
     
    147147               
    148148                /* Set type to requested breakpoint & length*/
    149                 dr7 &= ~(0x3 << (16 + 4 * curidx));
    150                 dr7 &= ~(0x3 << (18 + 4 * curidx));
     149                dr7 &= ~(0x03U << (16 + 4 * curidx));
     150                dr7 &= ~(0x03U << (18 + 4 * curidx));
    151151               
    152152                if (!(flags & BKPOINT_INSTR)) {
    153153#ifdef __32_BITS__
    154                         dr7 |= ((unative_t) 0x3) << (18 + 4 * curidx);
     154                        dr7 |= ((unative_t) 0x03U) << (18 + 4 * curidx);
    155155#endif
    156156                       
    157157#ifdef __64_BITS__
    158                         dr7 |= ((unative_t) 0x2) << (18 + 4 * curidx);
     158                        dr7 |= ((unative_t) 0x02U) << (18 + 4 * curidx);
    159159#endif
    160160                       
    161161                        if ((flags & BKPOINT_WRITE))
    162                                 dr7 |= ((unative_t) 0x1) << (16 + 4 * curidx);
     162                                dr7 |= ((unative_t) 0x01U) << (16 + 4 * curidx);
    163163                        else if ((flags & BKPOINT_READ_WRITE))
    164                                 dr7 |= ((unative_t) 0x3) << (16 + 4 * curidx);
     164                                dr7 |= ((unative_t) 0x03U) << (16 + 4 * curidx);
    165165                }
    166166               
    167167                /* Enable global breakpoint */
    168                 dr7 |= 0x2 << (curidx * 2);
     168                dr7 |= 0x02U << (curidx * 2);
    169169               
    170170                write_dr7(dr7);
  • kernel/arch/amd64/src/pm.c

    r8b3bff5 rdc0b964  
    2828 */
    2929
    30 /** @addtogroup amd64   
     30/** @addtogroup amd64
    3131 * @{
    3232 */
     
    5252        { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
    5353        /* KTEXT descriptor */
    54         { .limit_0_15  = 0xffff,
    55           .base_0_15   = 0, 
    56           .base_16_23  = 0, 
    57           .access      = AR_PRESENT | AR_CODE | DPL_KERNEL | AR_READABLE, 
    58           .limit_16_19 = 0xf,
    59           .available   = 0, 
    60           .longmode    = 1, 
     54        { .limit_0_15  = 0xffffU,
     55          .base_0_15   = 0,
     56          .base_16_23  = 0,
     57          .access      = AR_PRESENT | AR_CODE | DPL_KERNEL | AR_READABLE,
     58          .limit_16_19 = 0x0fU,
     59          .available   = 0,
     60          .longmode    = 1,
    6161          .special     = 0,
    62           .granularity = 1, 
     62          .granularity = 1,
    6363          .base_24_31  = 0 },
    6464        /* KDATA descriptor */
    65         { .limit_0_15  = 0xffff,
    66           .base_0_15   = 0, 
    67           .base_16_23  = 0, 
    68           .access      = AR_PRESENT | AR_DATA | AR_WRITABLE | DPL_KERNEL, 
    69           .limit_16_19 = 0xf,
    70           .available   = 0, 
    71           .longmode    = 0, 
    72           .special     = 0, 
    73           .granularity = 1, 
     65        { .limit_0_15  = 0xffffU,
     66          .base_0_15   = 0,
     67          .base_16_23  = 0,
     68          .access      = AR_PRESENT | AR_DATA | AR_WRITABLE | DPL_KERNEL,
     69          .limit_16_19 = 0x0fU,
     70          .available   = 0,
     71          .longmode    = 0,
     72          .special     = 0,
     73          .granularity = 1,
    7474          .base_24_31  = 0 },
    7575        /* UDATA descriptor */
    76         { .limit_0_15  = 0xffff,
    77           .base_0_15   = 0, 
    78           .base_16_23  = 0, 
    79           .access      = AR_PRESENT | AR_DATA | AR_WRITABLE | DPL_USER, 
    80           .limit_16_19 = 0xf,
    81           .available   = 0, 
    82           .longmode    = 0, 
    83           .special     = 1, 
    84           .granularity = 1, 
     76        { .limit_0_15  = 0xffffU,
     77          .base_0_15   = 0,
     78          .base_16_23  = 0,
     79          .access      = AR_PRESENT | AR_DATA | AR_WRITABLE | DPL_USER,
     80          .limit_16_19 = 0x0fU,
     81          .available   = 0,
     82          .longmode    = 0,
     83          .special     = 1,
     84          .granularity = 1,
    8585          .base_24_31  = 0 },
    8686        /* UTEXT descriptor */
    87         { .limit_0_15  = 0xffff,
    88           .base_0_15   = 0, 
    89           .base_16_23  = 0, 
    90           .access      = AR_PRESENT | AR_CODE | DPL_USER, 
    91           .limit_16_19 = 0xf,
    92           .available   = 0, 
    93           .longmode    = 1, 
    94           .special     = 0, 
    95           .granularity = 1, 
     87        { .limit_0_15  = 0xffffU,
     88          .base_0_15   = 0,
     89          .base_16_23  = 0,
     90          .access      = AR_PRESENT | AR_CODE | DPL_USER,
     91          .limit_16_19 = 0x0fU,
     92          .available   = 0,
     93          .longmode    = 1,
     94          .special     = 0,
     95          .granularity = 1,
    9696          .base_24_31  = 0 },
    9797        /* KTEXT 32-bit protected, for protected mode before long mode */
    98         { .limit_0_15  = 0xffff,
    99           .base_0_15   = 0, 
    100           .base_16_23  = 0, 
    101           .access      = AR_PRESENT | AR_CODE | DPL_KERNEL | AR_READABLE, 
    102           .limit_16_19 = 0xf,
    103           .available   = 0, 
    104           .longmode    = 0, 
     98        { .limit_0_15  = 0xffffU,
     99          .base_0_15   = 0,
     100          .base_16_23  = 0,
     101          .access      = AR_PRESENT | AR_CODE | DPL_KERNEL | AR_READABLE,
     102          .limit_16_19 = 0x0fU,
     103          .available   = 0,
     104          .longmode    = 0,
    105105          .special     = 1,
    106           .granularity = 1, 
     106          .granularity = 1,
    107107          .base_24_31  = 0 },
    108108        /* TSS descriptor - set up will be completed later,
     
    111111        { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
    112112        /* VESA Init descriptor */
    113 #ifdef CONFIG_FB       
    114         { 0xffff, 0, VESA_INIT_SEGMENT >> 12, AR_PRESENT | AR_CODE | DPL_KERNEL,
    115           0xf, 0, 0, 0, 0, 0
     113#ifdef CONFIG_FB
     114        {
     115                0xffff, 0, VESA_INIT_SEGMENT >> 12, AR_PRESENT | AR_CODE | DPL_KERNEL,
     116                    0xf, 0, 0, 0, 0, 0
    116117        }
    117118#endif
     
    129130{
    130131        tss_descriptor_t *td = (tss_descriptor_t *) d;
    131 
    132         td->base_0_15 = base & 0xffff;
    133         td->base_16_23 = ((base) >> 16) & 0xff;
    134         td->base_24_31 = ((base) >> 24) & 0xff;
     132       
     133        td->base_0_15 = base & 0xffffU;
     134        td->base_16_23 = ((base) >> 16) & 0xffU;
     135        td->base_24_31 = ((base) >> 24) & 0xffU;
    135136        td->base_32_63 = ((base) >> 32);
    136137}
     
    140141        tss_descriptor_t *td = (tss_descriptor_t *) d;
    141142       
    142         td->limit_0_15 = limit & 0xffff;
    143         td->limit_16_19 = (limit >> 16) & 0xf;
     143        td->limit_0_15 = limit & 0xffffU;
     144        td->limit_16_19 = (limit >> 16) & 0x0fU;
    144145}
    145146
     
    149150         * Offset is a linear address.
    150151         */
    151         d->offset_0_15 = offset & 0xffff;
    152         d->offset_16_31 = offset >> 16 & 0xffff;
     152        d->offset_0_15 = offset & 0xffffU;
     153        d->offset_16_31 = (offset >> 16) & 0xffffU;
    153154        d->offset_32_63 = offset >> 32;
    154155}
     
    165166{
    166167        idescriptor_t *d;
    167         int i;
    168 
     168        unsigned int i;
     169       
    169170        for (i = 0; i < IDT_ITEMS; i++) {
    170171                d = &idt[i];
    171 
     172               
    172173                d->unused = 0;
    173174                d->selector = GDT_SELECTOR(KTEXT_DES);
    174 
     175               
    175176                d->present = 1;
    176                 d->type = AR_INTERRUPT; /* masking interrupt */
     177                d->type = AR_INTERRUPT;  /* masking interrupt */
    177178        }
    178 
     179       
    179180        d = &idt[0];
    180181        idt_setoffset(d++, (uintptr_t) &int_0);
  • kernel/arch/arm32/include/types.h

    r8b3bff5 rdc0b964  
    5757} fncptr_t;
    5858
    59 #define PRIp "x"  /**< Format for uintptr_t. */
    60 #define PRIs "u"  /**< Format for size_t. */
    61 
    62 #define PRId8 "d"     /**< Format for int8_t. */
    63 #define PRId16 "d"    /**< Format for int16_t. */
    64 #define PRId32 "d"    /**< Format for int32_t. */
    65 #define PRId64 "lld"  /**< Format for int64_t. */
    66 #define PRIdn "d"     /**< Format for native_t. */
    67 
    68 #define PRIu8 "u"     /**< Format for uint8_t. */
    69 #define PRIu16 "u"    /**< Format for uint16_t. */
    70 #define PRIu32 "u"    /**< Format for uint32_t. */
    71 #define PRIu64 "llu"  /**< Format for uint64_t. */
    72 #define PRIun "u"     /**< Format for unative_t. */
    73 
    74 #define PRIx8 "x"     /**< Format for hexadecimal (u)int8_t. */
    75 #define PRIx16 "x"    /**< Format for hexadecimal (u)int16_t. */
    76 #define PRIx32 "x"    /**< Format for hexadecimal (u)uint32_t. */
    77 #define PRIx64 "llx"  /**< Format for hexadecimal (u)int64_t. */
    78 #define PRIxn "x"     /**< Format for hexadecimal (u)native_t. */
     59#define PRIp   PRIx32  /**< Format for uintptr_t. */
     60#define PRIs   PRIu32  /**< Format for size_t. */
     61#define PRIdn  PRId32  /**< Format for native_t. */
     62#define PRIun  PRIu32  /**< Format for unative_t. */
     63#define PRIxn  PRIx32  /**< Format for hexadecimal unative_t. */
    7964
    8065#endif
  • kernel/arch/ia32/include/boot/boot.h

    r8b3bff5 rdc0b964  
    3838#define BOOT_OFFSET      0x108000
    3939#define AP_BOOT_OFFSET   0x8000
    40 #define BOOT_STACK_SIZE  0x400
     40#define BOOT_STACK_SIZE  0x0400
    4141
    4242#define MULTIBOOT_HEADER_MAGIC  0x1BADB002
  • kernel/arch/ia32/include/boot/memmap.h

    r8b3bff5 rdc0b964  
    7070
    7171extern e820memmap_t e820table[MEMMAP_E820_MAX_RECORDS];
    72 extern uint8_t e820counter; 
     72extern uint8_t e820counter;
    7373
    7474#endif
  • kernel/arch/ia32/include/context.h

    r8b3bff5 rdc0b964  
    2727 */
    2828
    29 /** @addtogroup ia32   
     29/** @addtogroup ia32
    3030 * @{
    3131 */
     
    4040#include <typedefs.h>
    4141
    42 #define STACK_ITEM_SIZE 4
     42#define STACK_ITEM_SIZE  4
    4343
    4444/*
     
    4848 * One item is put onto stack to support get_stack_base().
    4949 */
    50 #define SP_DELTA        (8 + STACK_ITEM_SIZE)
     50#define SP_DELTA  (8 + STACK_ITEM_SIZE)
    5151
    5252#define context_set(c, _pc, stack, size) \
  • kernel/arch/ia32/include/context_offset.h

    r8b3bff5 rdc0b964  
    2727 */
    2828
    29 /** @addtogroup ia32   
     29/** @addtogroup ia32
    3030 * @{
    3131 */
     
    3636#define KERN_ia32_CONTEXT_OFFSET_H_
    3737
    38 #define OFFSET_SP  0x0
    39 #define OFFSET_PC  0x4
    40 #define OFFSET_EBX 0x8
    41 #define OFFSET_ESI 0xC
    42 #define OFFSET_EDI 0x10
    43 #define OFFSET_EBP 0x14
     38#define OFFSET_SP   0x00
     39#define OFFSET_PC   0x04
     40#define OFFSET_EBX  0x08
     41#define OFFSET_ESI  0x0C
     42#define OFFSET_EDI  0x10
     43#define OFFSET_EBP  0x14
    4444
    45 #ifdef KERNEL 
    46 # define OFFSET_IPL 0x18
     45#ifdef KERNEL
     46        #define OFFSET_IPL 0x18
    4747#else
    48 # define OFFSET_TLS 0x18
     48        #define OFFSET_TLS 0x18
    4949#endif
    5050
     51#ifdef __ASM__
    5152
    52 #ifdef __ASM__
    53 
    54 # ctx: address of the structure with saved context
     53# ctx: address of the structure with saved context
    5554# pc: return address
    5655
    5756.macro CONTEXT_SAVE_ARCH_CORE ctx:req pc:req
    58         movl %esp,OFFSET_SP(\ctx)       # %esp -> ctx->sp       
     57        movl %esp,OFFSET_SP(\ctx)       # %esp -> ctx->sp
    5958        movl \pc,OFFSET_PC(\ctx)        # %eip -> ctx->pc
    60         movl %ebx,OFFSET_EBX(\ctx)      # %ebx -> ctx->ebx     
    61         movl %esi,OFFSET_ESI(\ctx)      # %esi -> ctx->esi     
    62         movl %edi,OFFSET_EDI(\ctx)      # %edi -> ctx->edi     
    63         movl %ebp,OFFSET_EBP(\ctx)      # %ebp -> ctx->ebp     
     59        movl %ebx,OFFSET_EBX(\ctx)      # %ebx -> ctx->ebx
     60        movl %esi,OFFSET_ESI(\ctx)      # %esi -> ctx->esi
     61        movl %edi,OFFSET_EDI(\ctx)      # %edi -> ctx->edi
     62        movl %ebp,OFFSET_EBP(\ctx)      # %ebp -> ctx->ebp
    6463.endm
    6564
    66 # ctx: address of the structure with saved context 
     65# ctx: address of the structure with saved context
    6766
    6867.macro CONTEXT_RESTORE_ARCH_CORE ctx:req pc:req
     
    7574.endm
    7675
    77 #endif /* __ASM__ */ 
     76#endif /* __ASM__ */
    7877
    7978#endif
     
    8180/** @}
    8281 */
    83 
  • kernel/arch/ia32/include/cpu.h

    r8b3bff5 rdc0b964  
    4444
    4545/* Support for SYSENTER and SYSEXIT */
    46 #define IA32_MSR_SYSENTER_CS    0x174
    47 #define IA32_MSR_SYSENTER_ESP   0x175
    48 #define IA32_MSR_SYSENTER_EIP   0x176
     46#define IA32_MSR_SYSENTER_CS   0x174U
     47#define IA32_MSR_SYSENTER_ESP  0x175U
     48#define IA32_MSR_SYSENTER_EIP  0x176U
    4949
    5050#ifndef __ASM__
  • kernel/arch/ia32/include/drivers/i8259.h

    r8b3bff5 rdc0b964  
    3939#include <arch/interrupt.h>
    4040
    41 #define PIC_PIC0PORT1  ((ioport8_t *) 0x20)
    42 #define PIC_PIC0PORT2  ((ioport8_t *) 0x21)
    43 #define PIC_PIC1PORT1  ((ioport8_t *) 0xa0)
    44 #define PIC_PIC1PORT2  ((ioport8_t *) 0xa1)
     41#define PIC_PIC0PORT1  ((ioport8_t *) 0x20U)
     42#define PIC_PIC0PORT2  ((ioport8_t *) 0x21U)
     43#define PIC_PIC1PORT1  ((ioport8_t *) 0xa0U)
     44#define PIC_PIC1PORT2  ((ioport8_t *) 0xa1U)
    4545
    4646#define PIC_NEEDICW4  (1 << 0)
  • kernel/arch/ia32/include/istate.h

    r8b3bff5 rdc0b964  
    3737
    3838#ifdef KERNEL
     39
    3940#include <typedefs.h>
    4041#include <trace.h>
    41 #else
     42
     43#else /* KERNEL */
     44
    4245#include <sys/types.h>
     46
    4347#define NO_TRACE
    44 #endif
     48
     49#endif /* KERNEL */
    4550
    4651typedef struct istate {
     
    7782NO_TRACE static inline int istate_from_uspace(istate_t *istate)
    7883{
    79         return !(istate->eip & 0x80000000);
     84        return !(istate->eip & UINT32_C(0x80000000));
    8085}
    8186
  • kernel/arch/ia32/include/mm/as.h

    r8b3bff5 rdc0b964  
    3636#define KERN_ia32_AS_H_
    3737
    38 #define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH      0
     38#define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH  0
    3939
    40 #define KERNEL_ADDRESS_SPACE_START_ARCH         ((unsigned long) 0x80000000)
    41 #define KERNEL_ADDRESS_SPACE_END_ARCH           ((unsigned long) 0xffffffff)
    42 #define USER_ADDRESS_SPACE_START_ARCH           ((unsigned long) 0x00000000)
    43 #define USER_ADDRESS_SPACE_END_ARCH             ((unsigned long) 0x7fffffff)
     40#define KERNEL_ADDRESS_SPACE_START_ARCH  UINT32_C(0x80000000)
     41#define KERNEL_ADDRESS_SPACE_END_ARCH    UINT32_C(0xffffffff)
     42#define USER_ADDRESS_SPACE_START_ARCH    UINT32_C(0x00000000)
     43#define USER_ADDRESS_SPACE_END_ARCH      UINT32_C(0x7fffffff)
    4444
    45 #define USTACK_ADDRESS_ARCH     (USER_ADDRESS_SPACE_END_ARCH - (PAGE_SIZE - 1))
     45#define USTACK_ADDRESS_ARCH  (USER_ADDRESS_SPACE_END_ARCH - (PAGE_SIZE - 1))
    4646
    4747typedef struct {
     
    5050#include <genarch/mm/as_pt.h>
    5151
    52 #define as_constructor_arch(as, flags)          (as != as)
    53 #define as_destructor_arch(as)                  (as != as)
    54 #define as_create_arch(as, flags)               (as != as)
     52#define as_constructor_arch(as, flags)  (as != as)
     53#define as_destructor_arch(as)          (as != as)
     54#define as_create_arch(as, flags)       (as != as)
    5555#define as_install_arch(as)
    5656#define as_deinstall_arch(as)
  • kernel/arch/ia32/include/mm/page.h

    r8b3bff5 rdc0b964  
    3939#include <trace.h>
    4040
    41 #define PAGE_WIDTH      FRAME_WIDTH
    42 #define PAGE_SIZE       FRAME_SIZE
     41#define PAGE_WIDTH  FRAME_WIDTH
     42#define PAGE_SIZE   FRAME_SIZE
    4343
    4444#ifdef KERNEL
    4545
    4646#ifndef __ASM__
    47 #       define KA2PA(x) (((uintptr_t) (x)) - 0x80000000)
    48 #       define PA2KA(x) (((uintptr_t) (x)) + 0x80000000)
    49 #else
    50 #       define KA2PA(x) ((x) - 0x80000000)
    51 #       define PA2KA(x) ((x) + 0x80000000)
    52 #endif
     47
     48#define KA2PA(x)  (((uintptr_t) (x)) - UINT32_C(0x80000000))
     49#define PA2KA(x)  (((uintptr_t) (x)) + UINT32_C(0x80000000))
     50
     51#else /* __ASM__ */
     52
     53#define KA2PA(x)  ((x) - 0x80000000)
     54#define PA2KA(x)  ((x) + 0x80000000)
     55
     56#endif /* __ASM__ */
    5357
    5458/*
     
    5862
    5963/* Number of entries in each level. */
    60 #define PTL0_ENTRIES_ARCH       1024
    61 #define PTL1_ENTRIES_ARCH       0
    62 #define PTL2_ENTRIES_ARCH       0
    63 #define PTL3_ENTRIES_ARCH       1024
     64#define PTL0_ENTRIES_ARCH  1024
     65#define PTL1_ENTRIES_ARCH  0
     66#define PTL2_ENTRIES_ARCH  0
     67#define PTL3_ENTRIES_ARCH  1024
    6468
    6569/* Page table sizes for each level. */
    66 #define PTL0_SIZE_ARCH          ONE_FRAME
    67 #define PTL1_SIZE_ARCH          0
    68 #define PTL2_SIZE_ARCH          0
    69 #define PTL3_SIZE_ARCH          ONE_FRAME
     70#define PTL0_SIZE_ARCH  ONE_FRAME
     71#define PTL1_SIZE_ARCH  0
     72#define PTL2_SIZE_ARCH  0
     73#define PTL3_SIZE_ARCH  ONE_FRAME
    7074
    7175/* Macros calculating indices for each level. */
    72 #define PTL0_INDEX_ARCH(vaddr)  (((vaddr) >> 22) & 0x3ff)
    73 #define PTL1_INDEX_ARCH(vaddr)  0
    74 #define PTL2_INDEX_ARCH(vaddr)  0
    75 #define PTL3_INDEX_ARCH(vaddr)  (((vaddr) >> 12) & 0x3ff)
     76#define PTL0_INDEX_ARCH(vaddr)  (((vaddr) >> 22) & 0x3ffU)
     77#define PTL1_INDEX_ARCH(vaddr)  0
     78#define PTL2_INDEX_ARCH(vaddr)  0
     79#define PTL3_INDEX_ARCH(vaddr)  (((vaddr) >> 12) & 0x3ffU)
    7680
    7781/* Get PTE address accessors for each level. */
     
    122126#define PTE_WRITABLE_ARCH(p) \
    123127        ((p)->writeable != 0)
    124 #define PTE_EXECUTABLE_ARCH(p)                  1
     128#define PTE_EXECUTABLE_ARCH(p)  1
    125129
    126130#ifndef __ASM__
     
    144148
    145149/** When bit on this position is 1, a reserved bit was set in page directory. */
    146 #define PFERR_CODE_RSVD         (1 << 3)       
     150#define PFERR_CODE_RSVD         (1 << 3)
    147151
    148152/** Page Table Entry. */
  • kernel/arch/ia32/include/smp/ap.h

    r8b3bff5 rdc0b964  
    2727 */
    2828
    29 /** @addtogroup ia32   
     29/** @addtogroup ia32
    3030 * @{
    3131 */
  • kernel/arch/ia32/include/smp/apic.h

    r8b3bff5 rdc0b964  
    4949
    5050/** Delivery modes. */
    51 #define DELMOD_FIXED    0x0
    52 #define DELMOD_LOWPRI   0x1
    53 #define DELMOD_SMI      0x2
     51#define DELMOD_FIXED    0x0U
     52#define DELMOD_LOWPRI   0x1U
     53#define DELMOD_SMI      0x2U
    5454/* 0x3 reserved */
    55 #define DELMOD_NMI      0x4
    56 #define DELMOD_INIT     0x5
    57 #define DELMOD_STARTUP  0x6
    58 #define DELMOD_EXTINT   0x7
     55#define DELMOD_NMI      0x4U
     56#define DELMOD_INIT     0x5U
     57#define DELMOD_STARTUP  0x6U
     58#define DELMOD_EXTINT   0x7U
    5959
    6060/** Destination modes. */
    61 #define DESTMOD_PHYS   0x0
    62 #define DESTMOD_LOGIC  0x1
     61#define DESTMOD_PHYS   0x0U
     62#define DESTMOD_LOGIC  0x1U
    6363
    6464/** Trigger Modes. */
    65 #define TRIGMOD_EDGE   0x0
    66 #define TRIGMOD_LEVEL  0x1
     65#define TRIGMOD_EDGE   0x0U
     66#define TRIGMOD_LEVEL  0x1U
    6767
    6868/** Levels. */
    69 #define LEVEL_DEASSERT  0x0
    70 #define LEVEL_ASSERT    0x1
     69#define LEVEL_DEASSERT  0x0U
     70#define LEVEL_ASSERT    0x1U
    7171
    7272/** Destination Shorthands. */
    73 #define SHORTHAND_NONE      0x0
    74 #define SHORTHAND_SELF      0x1
    75 #define SHORTHAND_ALL_INCL  0x2
    76 #define SHORTHAND_ALL_EXCL  0x3
     73#define SHORTHAND_NONE      0x0U
     74#define SHORTHAND_SELF      0x1U
     75#define SHORTHAND_ALL_INCL  0x2U
     76#define SHORTHAND_ALL_EXCL  0x3U
    7777
    7878/** Interrupt Input Pin Polarities. */
    79 #define POLARITY_HIGH  0x0
    80 #define POLARITY_LOW   0x1
     79#define POLARITY_HIGH  0x0U
     80#define POLARITY_LOW   0x1U
    8181
    8282/** Divide Values. (Bit 2 is always 0) */
    83 #define DIVIDE_2    0x0
    84 #define DIVIDE_4    0x1
    85 #define DIVIDE_8    0x2
    86 #define DIVIDE_16   0x3
    87 #define DIVIDE_32   0x8
    88 #define DIVIDE_64   0x9
    89 #define DIVIDE_128  0xa
    90 #define DIVIDE_1    0xb
     83#define DIVIDE_2    0x0U
     84#define DIVIDE_4    0x1U
     85#define DIVIDE_8    0x2U
     86#define DIVIDE_16   0x3U
     87#define DIVIDE_32   0x8U
     88#define DIVIDE_64   0x9U
     89#define DIVIDE_128  0xaU
     90#define DIVIDE_1    0xbU
    9191
    9292/** Timer Modes. */
    93 #define TIMER_ONESHOT   0x0
    94 #define TIMER_PERIODIC  0x1
     93#define TIMER_ONESHOT   0x0U
     94#define TIMER_PERIODIC  0x1U
    9595
    9696/** Delivery status. */
    97 #define DELIVS_IDLE     0x0
    98 #define DELIVS_PENDING  0x1
     97#define DELIVS_IDLE     0x0U
     98#define DELIVS_PENDING  0x1U
    9999
    100100/** Destination masks. */
    101 #define DEST_ALL  0xff
     101#define DEST_ALL  0xffU
    102102
    103103/** Dest format models. */
    104 #define MODEL_FLAT     0xf
    105 #define MODEL_CLUSTER  0x0
     104#define MODEL_FLAT     0xfU
     105#define MODEL_CLUSTER  0x0U
    106106
    107107/** Interrupt Command Register. */
    108 #define ICRlo  (0x300 / sizeof(uint32_t))
    109 #define ICRhi  (0x310 / sizeof(uint32_t))
     108#define ICRlo  (0x300U / sizeof(uint32_t))
     109#define ICRhi  (0x310U / sizeof(uint32_t))
    110110
    111111typedef struct {
     
    135135
    136136/* End Of Interrupt. */
    137 #define EOI  (0x0b0 / sizeof(uint32_t))
     137#define EOI  (0x0b0U / sizeof(uint32_t))
    138138
    139139/** Error Status Register. */
    140 #define ESR  (0x280 / sizeof(uint32_t))
     140#define ESR  (0x280U / sizeof(uint32_t))
    141141
    142142typedef union {
     
    157157
    158158/* Task Priority Register */
    159 #define TPR  (0x080 / sizeof(uint32_t))
     159#define TPR  (0x080U / sizeof(uint32_t))
    160160
    161161typedef union {
     
    168168
    169169/** Spurious-Interrupt Vector Register. */
    170 #define SVR  (0x0f0 / sizeof(uint32_t))
     170#define SVR  (0x0f0U / sizeof(uint32_t))
    171171
    172172typedef union {
     
    181181
    182182/** Time Divide Configuration Register. */
    183 #define TDCR  (0x3e0 / sizeof(uint32_t))
     183#define TDCR  (0x3e0U / sizeof(uint32_t))
    184184
    185185typedef union {
     
    192192
    193193/* Initial Count Register for Timer */
    194 #define ICRT  (0x380 / sizeof(uint32_t))
     194#define ICRT  (0x380U / sizeof(uint32_t))
    195195
    196196/* Current Count Register for Timer */
    197 #define CCRT  (0x390 / sizeof(uint32_t))
     197#define CCRT  (0x390U / sizeof(uint32_t))
    198198
    199199/** LVT Timer register. */
    200 #define LVT_Tm  (0x320 / sizeof(uint32_t))
     200#define LVT_Tm  (0x320U / sizeof(uint32_t))
    201201
    202202typedef union {
     
    214214
    215215/** LVT LINT registers. */
    216 #define LVT_LINT0  (0x350 / sizeof(uint32_t))
    217 #define LVT_LINT1  (0x360 / sizeof(uint32_t))
     216#define LVT_LINT0  (0x350U / sizeof(uint32_t))
     217#define LVT_LINT1  (0x360U / sizeof(uint32_t))
    218218
    219219typedef union {
     
    233233
    234234/** LVT Error register. */
    235 #define LVT_Err  (0x370 / sizeof(uint32_t))
     235#define LVT_Err  (0x370U / sizeof(uint32_t))
    236236
    237237typedef union {
     
    248248
    249249/** Local APIC ID Register. */
    250 #define L_APIC_ID  (0x020 / sizeof(uint32_t))
     250#define L_APIC_ID  (0x020U / sizeof(uint32_t))
    251251
    252252typedef union {
     
    259259
    260260/** Local APIC Version Register */
    261 #define LAVR       (0x030 / sizeof(uint32_t))
    262 #define LAVR_Mask  0xff
    263 
    264 #define is_local_apic(x)    (((x) & LAVR_Mask & 0xf0) == 0x1)
    265 #define is_82489DX_apic(x)  ((((x) & LAVR_Mask & 0xf0) == 0x0))
    266 #define is_local_xapic(x)   (((x) & LAVR_Mask) == 0x14)
     261#define LAVR       (0x030U / sizeof(uint32_t))
     262#define LAVR_Mask  0xffU
     263
     264#define is_local_apic(x)    (((x) & LAVR_Mask & 0xf0U) == 0x1U)
     265#define is_82489DX_apic(x)  ((((x) & LAVR_Mask & 0xf0U) == 0x0U))
     266#define is_local_xapic(x)   (((x) & LAVR_Mask) == 0x14U)
    267267
    268268/** Logical Destination Register. */
    269 #define  LDR  (0x0d0 / sizeof(uint32_t))
     269#define  LDR  (0x0d0U / sizeof(uint32_t))
    270270
    271271typedef union {
     
    278278
    279279/** Destination Format Register. */
    280 #define DFR  (0x0e0 / sizeof(uint32_t))
     280#define DFR  (0x0e0U / sizeof(uint32_t))
    281281
    282282typedef union {
     
    289289
    290290/* IO APIC */
    291 #define IOREGSEL  (0x00 / sizeof(uint32_t))
    292 #define IOWIN     (0x10 / sizeof(uint32_t))
    293 
    294 #define IOAPICID   0x00
    295 #define IOAPICVER  0x01
    296 #define IOAPICARB  0x02
    297 #define IOREDTBL   0x10
     291#define IOREGSEL  (0x00U / sizeof(uint32_t))
     292#define IOWIN     (0x10U / sizeof(uint32_t))
     293
     294#define IOAPICID   0x00U
     295#define IOAPICVER  0x01U
     296#define IOAPICARB  0x02U
     297#define IOREDTBL   0x10U
    298298
    299299/** I/O Register Select Register. */
  • kernel/arch/ia32/include/types.h

    r8b3bff5 rdc0b964  
    5050} fncptr_t;
    5151
    52 #define PRIp "x"  /**< Format for uintptr_t. */
    53 #define PRIs "u"  /**< Format for size_t. */
    54 
    55 #define PRId8 "d"     /**< Format for int8_t. */
    56 #define PRId16 "d"    /**< Format for int16_t. */
    57 #define PRId32 "d"    /**< Format for int32_t. */
    58 #define PRId64 "lld"  /**< Format for int64_t. */
    59 #define PRIdn "d"     /**< Format for native_t. */
    60 
    61 #define PRIu8 "u"     /**< Format for uint8_t. */
    62 #define PRIu16 "u"    /**< Format for uint16_t. */
    63 #define PRIu32 "u"    /**< Format for uint32_t. */
    64 #define PRIu64 "llu"  /**< Format for uint64_t. */
    65 #define PRIun "u"     /**< Format for unative_t. */
    66 
    67 #define PRIx8 "x"     /**< Format for hexadecimal (u)int8_t. */
    68 #define PRIx16 "x"    /**< Format for hexadecimal (u)int16_t. */
    69 #define PRIx32 "x"    /**< Format for hexadecimal (u)uint32_t. */
    70 #define PRIx64 "llx"  /**< Format for hexadecimal (u)int64_t. */
    71 #define PRIxn "x"     /**< Format for hexadecimal (u)native_t. */
     52#define PRIp   PRIx32  /**< Format for uintptr_t. */
     53#define PRIs   PRIu32  /**< Format for size_t. */
     54#define PRIdn  PRId32  /**< Format for native_t. */
     55#define PRIun  PRIu32  /**< Format for unative_t. */
     56#define PRIxn  PRIx32  /**< Format for hexadecimal unative_t. */
    7257
    7358#endif
  • kernel/arch/ia32/src/bios/bios.c

    r8b3bff5 rdc0b964  
    3636#include <typedefs.h>
    3737
    38 #define BIOS_EBDA_PTR  0x40e
     38#define BIOS_EBDA_PTR  0x40eU
    3939
    4040uintptr_t ebda = 0;
     
    4343{
    4444        /* Copy the EBDA address out from BIOS Data Area */
    45         ebda = *((uint16_t *) BIOS_EBDA_PTR) * 0x10;
     45        ebda = *((uint16_t *) BIOS_EBDA_PTR) * 0x10U;
    4646}
    4747
  • kernel/arch/ia32/src/boot/memmap.c

    r8b3bff5 rdc0b964  
    3535#include <arch/boot/memmap.h>
    3636
    37 uint8_t e820counter = 0xff;
     37uint8_t e820counter = 0xffU;
    3838e820memmap_t e820table[MEMMAP_E820_MAX_RECORDS];
    3939
  • kernel/arch/ia32/src/cpu/cpu.c

    r8b3bff5 rdc0b964  
    4949 * Contains only non-MP-Specification specific SMP code.
    5050 */
    51 #define AMD_CPUID_EBX  0x68747541
    52 #define AMD_CPUID_ECX  0x444d4163
    53 #define AMD_CPUID_EDX  0x69746e65
     51#define AMD_CPUID_EBX  UINT32_C(0x68747541)
     52#define AMD_CPUID_ECX  UINT32_C(0x444d4163)
     53#define AMD_CPUID_EDX  UINT32_C(0x69746e65)
    5454
    55 #define INTEL_CPUID_EBX  0x756e6547
    56 #define INTEL_CPUID_ECX  0x6c65746e
    57 #define INTEL_CPUID_EDX  0x49656e69
     55#define INTEL_CPUID_EBX  UINT32_C(0x756e6547)
     56#define INTEL_CPUID_ECX  UINT32_C(0x6c65746e)
     57#define INTEL_CPUID_EDX  UINT32_C(0x49656e69)
    5858
    5959
     
    140140                if ((info.cpuid_ebx == AMD_CPUID_EBX)
    141141                    && (info.cpuid_ecx == AMD_CPUID_ECX)
    142                         && (info.cpuid_edx == AMD_CPUID_EDX))
     142                    && (info.cpuid_edx == AMD_CPUID_EDX))
    143143                        CPU->arch.vendor = VendorAMD;
    144144               
    145145                /*
    146146                 * Check for Intel processor.
    147                  */             
     147                 */
    148148                if ((info.cpuid_ebx == INTEL_CPUID_EBX)
    149149                    && (info.cpuid_ecx == INTEL_CPUID_ECX)
    150                         && (info.cpuid_edx == INTEL_CPUID_EDX))
     150                    && (info.cpuid_edx == INTEL_CPUID_EDX))
    151151                        CPU->arch.vendor = VendorIntel;
    152152               
    153153                cpuid(INTEL_CPUID_STANDARD, &info);
    154                 CPU->arch.family = (info.cpuid_eax >> 8) & 0x0f;
    155                 CPU->arch.model = (info.cpuid_eax >> 4) & 0x0f;
    156                 CPU->arch.stepping = (info.cpuid_eax >> 0) & 0x0f;                                             
     154                CPU->arch.family = (info.cpuid_eax >> 8) & 0x0fU;
     155                CPU->arch.model = (info.cpuid_eax >> 4) & 0x0fU;
     156                CPU->arch.stepping = (info.cpuid_eax >> 0) & 0x0fU;
    157157        }
    158158}
  • kernel/arch/ia32/src/debug/stacktrace.c

    r8b3bff5 rdc0b964  
    3737#include <typedefs.h>
    3838
    39 #define FRAME_OFFSET_FP_PREV    0
    40 #define FRAME_OFFSET_RA         1
     39#define FRAME_OFFSET_FP_PREV  0
     40#define FRAME_OFFSET_RA       1
    4141
    4242bool kernel_stack_trace_context_validate(stack_trace_context_t *ctx)
  • kernel/arch/ia32/src/drivers/i8254.c

    r8b3bff5 rdc0b964  
    5454#include <ddi/device.h>
    5555
    56 #define CLK_PORT1  ((ioport8_t *) 0x40)
    57 #define CLK_PORT4  ((ioport8_t *) 0x43)
     56#define CLK_PORT1  ((ioport8_t *) 0x40U)
     57#define CLK_PORT4  ((ioport8_t *) 0x43U)
    5858
    5959#define CLK_CONST     1193180
  • kernel/arch/ia32/src/drivers/i8259.c

    r8b3bff5 rdc0b964  
    121121void pic_eoi(void)
    122122{
    123         pio_write_8((ioport8_t *)0x20, 0x20);
    124         pio_write_8((ioport8_t *)0xa0, 0x20);
     123        pio_write_8((ioport8_t *) 0x20, 0x20);
     124        pio_write_8((ioport8_t *) 0xa0, 0x20);
    125125}
    126126
  • kernel/arch/ia32/src/drivers/vesa.c

    r8b3bff5 rdc0b964  
    7070bool vesa_init(void)
    7171{
    72         if ((vesa_width == 0xffff) || (vesa_height == 0xffff))
     72        if ((vesa_width == 0xffffU) || (vesa_height == 0xffffU))
    7373                return false;
    7474       
  • kernel/arch/ia32/src/mm/frame.c

    r8b3bff5 rdc0b964  
    4444#include <align.h>
    4545#include <macros.h>
    46 
    4746#include <print.h>
    4847
    49 #define PHYSMEM_LIMIT32  0x07c000000ull
    50 #define PHYSMEM_LIMIT64  0x200000000ull
     48#define PHYSMEM_LIMIT32  UINT64_C(0x07c000000)
     49#define PHYSMEM_LIMIT64  UINT64_C(0x200000000)
    5150
    5251size_t hardcoded_unmapped_ktext_size = 0;
  • kernel/arch/ia32/src/smp/apic.c

    r8b3bff5 rdc0b964  
    7272 *
    7373 */
    74 volatile uint32_t *l_apic = (uint32_t *) 0xfee00000;
    75 volatile uint32_t *io_apic = (uint32_t *) 0xfec00000;
     74volatile uint32_t *l_apic = (uint32_t *) UINT32_C(0xfee00000);
     75volatile uint32_t *io_apic = (uint32_t *) UINT32_C(0xfec00000);
    7676
    7777uint32_t apic_id_mask = 0;
     
    184184         * Other interrupts will be forwarded to the lowest priority CPU.
    185185         */
    186         io_apic_disable_irqs(0xffff);
     186        io_apic_disable_irqs(0xffffU);
    187187       
    188188        irq_initialize(&l_apic_timer_irq);
  • kernel/arch/ia32/src/smp/mps.c

    r8b3bff5 rdc0b964  
    5252 */
    5353
    54 #define FS_SIGNATURE  0x5f504d5f
    55 #define CT_SIGNATURE  0x504d4350
     54#define FS_SIGNATURE  UINT32_C(0x5f504d5f)
     55#define CT_SIGNATURE  UINT32_C(0x504d4350)
    5656
    5757static struct mps_fs *fs;
  • kernel/arch/ia64/include/types.h

    r8b3bff5 rdc0b964  
    5252} __attribute__((may_alias)) fncptr_t;
    5353
    54 #define PRIp "lx"  /**< Format for uintptr_t. */
    55 #define PRIs "lu"  /**< Format for size_t. */
    56 
    57 #define PRId8 "d"    /**< Format for int8_t. */
    58 #define PRId16 "d"   /**< Format for int16_t. */
    59 #define PRId32 "d"   /**< Format for int32_t. */
    60 #define PRId64 "ld"  /**< Format for int64_t. */
    61 #define PRIdn "d"    /**< Format for native_t. */
    62 
    63 #define PRIu8 "u"    /**< Format for uint8_t. */
    64 #define PRIu16 "u"   /**< Format for uint16_t. */
    65 #define PRIu32 "u"   /**< Format for uint32_t. */
    66 #define PRIu64 "lu"  /**< Format for uint64_t. */
    67 #define PRIun "u"    /**< Format for unative_t. */
    68 
    69 #define PRIx8 "x"    /**< Format for hexadecimal (u)int8_t. */
    70 #define PRIx16 "x"   /**< Format for hexadecimal (u)int16_t. */
    71 #define PRIx32 "x"   /**< Format for hexadecimal (u)uint32_t. */
    72 #define PRIx64 "lx"  /**< Format for hexadecimal (u)int64_t. */
    73 #define PRIxn "x"    /**< Format for hexadecimal (u)native_t. */
     54#define PRIp   PRIx64  /**< Format for uintptr_t. */
     55#define PRIs   PRIu64  /**< Format for size_t. */
     56#define PRIdn  PRId64  /**< Format for native_t. */
     57#define PRIun  PRIu64  /**< Format for unative_t. */
     58#define PRIxn  PRIx64  /**< Format for hexadecimal unative_t. */
    7459
    7560#endif
  • kernel/arch/mips32/include/types.h

    r8b3bff5 rdc0b964  
    5050} fncptr_t;
    5151
    52 #define PRIp "x"  /**< Format for uintptr_t. */
    53 #define PRIs "u"  /**< Format for size_t. */
    54 
    55 #define PRId8 "d"     /**< Format for int8_t. */
    56 #define PRId16 "d"    /**< Format for int16_t. */
    57 #define PRId32 "ld"   /**< Format for int32_t. */
    58 #define PRId64 "lld"  /**< Format for int64_t. */
    59 #define PRIdn "d"     /**< Format for native_t. */
    60 
    61 #define PRIu8 "u"     /**< Format for uint8_t. */
    62 #define PRIu16 "u"    /**< Format for uint16_t. */
    63 #define PRIu32 "u"    /**< Format for uint32_t. */
    64 #define PRIu64 "llu"  /**< Format for uint64_t. */
    65 #define PRIun "u"     /**< Format for unative_t. */
    66 
    67 #define PRIx8 "x"     /**< Format for hexadecimal (u)int8_t. */
    68 #define PRIx16 "x"    /**< Format for hexadecimal (u)int16_t. */
    69 #define PRIx32 "x"    /**< Format for hexadecimal (u)uint32_t. */
    70 #define PRIx64 "llx"  /**< Format for hexadecimal (u)int64_t. */
    71 #define PRIxn "x"     /**< Format for hexadecimal (u)native_t. */
     52#define PRIp   PRIx32  /**< Format for uintptr_t. */
     53#define PRIs   PRIu32  /**< Format for size_t. */
     54#define PRIdn  PRId32  /**< Format for native_t. */
     55#define PRIun  PRIu32  /**< Format for unative_t. */
     56#define PRIxn  PRIx32  /**< Format for hexadecimal unative_t. */
    7257
    7358#endif
  • kernel/arch/ppc32/include/types.h

    r8b3bff5 rdc0b964  
    5050} fncptr_t;
    5151
    52 /** Formats for uintptr_t, size_t */
    53 #define PRIp  "x"
    54 #define PRIs  "u"
    55 
    56 /** Formats for (u)int8_t, (u)int16_t, (u)int32_t, (u)int64_t and (u)native_t */
    57 #define PRId8   "d"
    58 #define PRId16  "d"
    59 #define PRId32  "d"
    60 #define PRId64  "lld"
    61 #define PRIdn   "d"
    62 
    63 #define PRIu8   "u"
    64 #define PRIu16  "u"
    65 #define PRIu32  "u"
    66 #define PRIu64  "llu"
    67 #define PRIun   "u"
    68 
    69 #define PRIx8   "x"
    70 #define PRIx16  "x"
    71 #define PRIx32  "x"
    72 #define PRIx64  "llx"
    73 #define PRIxn   "x"
     52#define PRIp   PRIx32  /**< Format for uintptr_t. */
     53#define PRIs   PRIu32  /**< Format for size_t. */
     54#define PRIdn  PRId32  /**< Format for native_t. */
     55#define PRIun  PRIu32  /**< Format for unative_t. */
     56#define PRIxn  PRIx32  /**< Format for hexadecimal unative_t. */
    7457
    7558#endif
  • kernel/arch/sparc64/include/types.h

    r8b3bff5 rdc0b964  
    5252typedef uint8_t asi_t;
    5353
    54 /** Formats for uintptr_t, size_t */
    55 #define PRIp  "llx"
    56 #define PRIs  "llu"
    57 
    58 /** Formats for (u)int8_t, (u)int16_t, (u)int32_t, (u)int64_t and (u)native_t */
    59 #define PRId8   "d"
    60 #define PRId16  "d"
    61 #define PRId32  "d"
    62 #define PRId64  "lld"
    63 #define PRIdn   "lld"
    64 
    65 #define PRIu8   "u"
    66 #define PRIu16  "u"
    67 #define PRIu32  "u"
    68 #define PRIu64  "llu"
    69 #define PRIun   "llu"
    70 
    71 #define PRIx8   "x"
    72 #define PRIx16  "x"
    73 #define PRIx32  "x"
    74 #define PRIx64  "llx"
    75 #define PRIxn   "llx"
     54#define PRIp   PRIx64  /**< Format for uintptr_t. */
     55#define PRIs   PRIu64  /**< Format for size_t. */
     56#define PRIdn  PRId64  /**< Format for native_t. */
     57#define PRIun  PRIu64  /**< Format for unative_t. */
     58#define PRIxn  PRIx64  /**< Format for hexadecimal unative_t. */
    7659
    7760#endif
  • tools/autotool.py

    r8b3bff5 rdc0b964  
    4949
    5050PACKAGE_BINUTILS = "usually part of binutils"
    51 PACKAGE_GCC = "preferably version 4.4.3 or newer"
     51PACKAGE_GCC = "preferably version 4.5.1 or newer"
    5252PACKAGE_CROSS = "use tools/toolchain.sh to build the cross-compiler toolchain"
    5353
    5454COMPILER_FAIL = "The compiler is probably not capable to compile HelenOS."
    5555
    56 PROBE_HEAD = """#define AUTOTOOL_DECLARE(category, subcategory, tag, name, value) \\
     56PROBE_HEAD = """#define AUTOTOOL_DECLARE(category, subcategory, tag, name, strc, conc, value) \\
    5757        asm volatile ( \\
    58                 "AUTOTOOL_DECLARE\\t" category "\\t" subcategory "\\t" tag "\\t" name "\\t%[val]\\n" \\
     58                "AUTOTOOL_DECLARE\\t" category "\\t" subcategory "\\t" tag "\\t" name "\\t" strc "\\t" conc "\\t%[val]\\n" \\
    5959                : \\
    6060                : [val] "n" (value) \\
    6161        )
    6262
    63 #define DECLARE_INTSIZE(tag, type) \\
    64         AUTOTOOL_DECLARE("intsize", "unsigned", tag, #type, sizeof(unsigned type)); \\
    65         AUTOTOOL_DECLARE("intsize", "signed", tag, #type, sizeof(signed type))
     63#define DECLARE_INTSIZE(tag, type, strc, conc) \\
     64        AUTOTOOL_DECLARE("intsize", "unsigned", tag, #type, strc, conc, sizeof(unsigned type)); \\
     65        AUTOTOOL_DECLARE("intsize", "signed", tag, #type, strc, conc, sizeof(signed type));
    6666
    6767int main(int argc, char *argv[])
     
    195195       
    196196        for typedef in sizes:
    197                 outf.write("\tDECLARE_INTSIZE(\"%s\", %s);\n" % (typedef['tag'], typedef['type']))
     197                outf.write("\tDECLARE_INTSIZE(\"%s\", %s, %s, %s);\n" % (typedef['tag'], typedef['type'], typedef['strc'], typedef['conc']))
    198198       
    199199        outf.write(PROBE_TAIL)
     
    231231        signed_tags = {}
    232232       
     233        unsigned_strcs = {}
     234        signed_strcs = {}
     235       
     236        unsigned_concs = {}
     237        signed_concs = {}
     238       
    233239        for j in range(len(lines)):
    234240                tokens = lines[j].strip().split("\t")
     
    236242                if (len(tokens) > 0):
    237243                        if (tokens[0] == "AUTOTOOL_DECLARE"):
    238                                 if (len(tokens) < 5):
     244                                if (len(tokens) < 7):
    239245                                        print_error(["Malformed declaration in \"%s\" on line %s." % (PROBE_OUTPUT, j), COMPILER_FAIL])
    240246                               
     
    243249                                tag = tokens[3]
    244250                                name = tokens[4]
    245                                 value = tokens[5]
     251                                strc = tokens[5]
     252                                conc = tokens[6]
     253                                value = tokens[7]
    246254                               
    247255                                if (category == "intsize"):
     
    263271                                                unsigned_sizes[name] = value_int
    264272                                                unsigned_tags[tag] = value_int
     273                                                if (strc != ""):
     274                                                        unsigned_strcs[strc] = value_int
     275                                                if (conc != ""):
     276                                                        unsigned_concs[conc] = value_int
    265277                                        elif (subcategory == "signed"):
    266278                                                signed_sizes[name] = value_int
    267279                                                signed_tags[tag] = value_int
     280                                                if (strc != ""):
     281                                                        signed_strcs[strc] = value_int
     282                                                if (conc != ""):
     283                                                        signed_concs[conc] = value_int
    268284                                        else:
    269285                                                print_error(["Unexpected keyword \"%s\" in \"%s\" on line %s." % (subcategory, PROBE_OUTPUT, j), COMPILER_FAIL])
    270286       
    271         return {'unsigned_sizes' : unsigned_sizes, 'signed_sizes' : signed_sizes, 'unsigned_tags': unsigned_tags, 'signed_tags': signed_tags}
     287        return {'unsigned_sizes': unsigned_sizes, 'signed_sizes': signed_sizes, 'unsigned_tags': unsigned_tags, 'signed_tags': signed_tags, 'unsigned_strcs': unsigned_strcs, 'signed_strcs': signed_strcs, 'unsigned_concs': unsigned_concs, 'signed_concs': signed_concs}
    272288
    273289def detect_uints(probe, bytes):
     
    279295        for b in bytes:
    280296                fnd = False
    281                 newtype = "uint%s_t" % (b * 8)
    282                
    283297                for name, value in probe['unsigned_sizes'].items():
    284298                        if (value == b):
    285                                 oldtype = "unsigned %s" % name
    286                                 typedefs.append({'oldtype' : oldtype, 'newtype' : newtype})
    287                                 fnd = True
    288                                 break
    289                
    290                 if (not fnd):
    291                         print_error(['Unable to find appropriate integer type for %s' % newtype,
     299                                typedefs.append({'oldtype': "unsigned %s" % name, 'newtype': "uint%u_t" % (b * 8)})
     300                                fnd = True
     301                                break
     302               
     303                if (not fnd):
     304                        print_error(['Unable to find appropriate unsigned integer type for %u bytes' % b,
    292305                                     COMPILER_FAIL])
    293306               
    294307               
    295308                fnd = False
    296                 newtype = "int%s_t" % (b * 8)
    297                
    298309                for name, value in probe['signed_sizes'].items():
    299310                        if (value == b):
    300                                 oldtype = "signed %s" % name
    301                                 typedefs.append({'oldtype' : oldtype, 'newtype' : newtype})
    302                                 fnd = True
    303                                 break
    304                
    305                 if (not fnd):
    306                         print_error(['Unable to find appropriate integer type for %s' % newtype,
     311                                typedefs.append({'oldtype': "signed %s" % name, 'newtype': "int%u_t" % (b * 8)})
     312                                fnd = True
     313                                break
     314               
     315                if (not fnd):
     316                        print_error(['Unable to find appropriate signed integer type for %u bytes' % b,
    307317                                     COMPILER_FAIL])
     318               
     319               
     320                fnd = False
     321                for name, value in probe['unsigned_strcs'].items():
     322                        if (value == b):
     323                                macros.append({'oldmacro': "\"%so\"" % name, 'newmacro': "PRIo%u" % (b * 8)})
     324                                macros.append({'oldmacro': "\"%su\"" % name, 'newmacro': "PRIu%u" % (b * 8)})
     325                                macros.append({'oldmacro': "\"%sx\"" % name, 'newmacro': "PRIx%u" % (b * 8)})
     326                                macros.append({'oldmacro': "\"%sX\"" % name, 'newmacro': "PRIX%u" % (b * 8)})
     327                                fnd = True
     328                                break
     329               
     330                if (not fnd):
     331                        macros.append({'oldmacro': "\"o\"", 'newmacro': "PRIo%u" % (b * 8)})
     332                        macros.append({'oldmacro': "\"u\"", 'newmacro': "PRIu%u" % (b * 8)})
     333                        macros.append({'oldmacro': "\"x\"", 'newmacro': "PRIx%u" % (b * 8)})
     334                        macros.append({'oldmacro': "\"X\"", 'newmacro': "PRIX%u" % (b * 8)})
     335               
     336               
     337                fnd = False
     338                for name, value in probe['signed_strcs'].items():
     339                        if (value == b):
     340                                macros.append({'oldmacro': "\"%sd\"" % name, 'newmacro': "PRId%u" % (b * 8)})
     341                                fnd = True
     342                                break
     343               
     344                if (not fnd):
     345                        macros.append({'oldmacro': "\"d\"", 'newmacro': "PRId%u" % (b * 8)})
     346               
     347               
     348                fnd = False
     349                for name, value in probe['unsigned_concs'].items():
     350                        if (value == b):
     351                                macros.append({'oldmacro': "c ## U%s" % name, 'newmacro': "UINT%u_C(c)" % (b * 8)})
     352                                fnd = True
     353                                break
     354               
     355                if (not fnd):
     356                        macros.append({'oldmacro': "c ## U", 'newmacro': "UINT%u_C(c)" % (b * 8)})
     357               
     358               
     359                fnd = False
     360                for name, value in probe['signed_concs'].items():
     361                        if (value == b):
     362                                macros.append({'oldmacro': "c ## %s" % name, 'newmacro': "INT%u_C(c)" % (b * 8)})
     363                                fnd = True
     364                                break
     365               
     366                if (not fnd):
     367                        macros.append({'oldmacro': "c", 'newmacro': "INT%u_C(c)" % (b * 8)})
    308368       
    309369        for tag in ['CHAR', 'SHORT', 'INT', 'LONG', 'LLONG']:
     
    508568                probe = probe_compiler(common,
    509569                        [
    510                                 {'type': 'char', 'tag': 'CHAR'},
    511                                 {'type': 'short int', 'tag': 'SHORT'},
    512                                 {'type': 'int', 'tag': 'INT'},
    513                                 {'type': 'long int', 'tag': 'LONG'},
    514                                 {'type': 'long long int', 'tag': 'LLONG'}
     570                                {'type': 'char', 'tag': 'CHAR', 'strc': '"hh"', 'conc': '""'},
     571                                {'type': 'short int', 'tag': 'SHORT', 'strc': '"h"', 'conc': '""'},
     572                                {'type': 'int', 'tag': 'INT', 'strc': '""', 'conc': '""'},
     573                                {'type': 'long int', 'tag': 'LONG', 'strc': '"l"', 'conc': '"L"'},
     574                                {'type': 'long long int', 'tag': 'LLONG', 'strc': '"ll"', 'conc': '"LL"'}
    515575                        ]
    516576                )
  • uspace/lib/c/arch/abs32le/include/inttypes.h

    r8b3bff5 rdc0b964  
    3434#define LIBC_abs32le_INTTYPES_H_
    3535
    36 #define PRId8 "d"
    37 #define PRId16 "d"
    38 #define PRId32 "d"
    39 #define PRId64 "lld"
    40 #define PRIdPTR "d"
    41 
    42 #define PRIo8 "o"
    43 #define PRIo16 "o"
    44 #define PRIo32 "o"
    45 #define PRIo64 "llo"
    46 #define PRIoPTR "o"
    47 
    48 #define PRIu8 "u"
    49 #define PRIu16 "u"
    50 #define PRIu32 "u"
    51 #define PRIu64 "llu"
    52 #define PRIuPTR "u"
    53 
    54 #define PRIx8 "x"
    55 #define PRIx16 "x"
    56 #define PRIx32 "x"
    57 #define PRIx64 "llx"
    58 #define PRIxPTR "x"
    59 
    60 #define PRIX8 "X"
    61 #define PRIX16 "X"
    62 #define PRIX32 "X"
    63 #define PRIX64 "llX"
    64 #define PRIXPTR "X"
     36#define PRIdPTR  PRId32
     37#define PRIoPTR  PRIo32
     38#define PRIuPTR  PRIu32
     39#define PRIxPTR  PRIx32
     40#define PRIXPTR  PRIX32
    6541
    6642#endif
  • uspace/lib/c/arch/amd64/include/inttypes.h

    r8b3bff5 rdc0b964  
    4141#define LIBC_amd64_INTTYPES_H_
    4242
    43 #define PRId8 "d"
    44 #define PRId16 "d"
    45 #define PRId32 "d"
    46 #define PRId64 "lld"
    47 #define PRIdPTR "lld"
    48 
    49 #define PRIo8 "o"
    50 #define PRIo16 "o"
    51 #define PRIo32 "o"
    52 #define PRIo64 "llo"
    53 #define PRIoPTR "llo"
    54 
    55 #define PRIu8 "u"
    56 #define PRIu16 "u"
    57 #define PRIu32 "u"
    58 #define PRIu64 "llu"
    59 #define PRIuPTR "llu"
    60 
    61 #define PRIx8 "x"
    62 #define PRIx16 "x"
    63 #define PRIx32 "x"
    64 #define PRIx64 "llx"
    65 #define PRIxPTR "llx"
    66 
    67 #define PRIX8 "X"
    68 #define PRIX16 "X"
    69 #define PRIX32 "X"
    70 #define PRIX64 "llX"
    71 #define PRIXPTR "llX"
     43#define PRIdPTR  PRId64
     44#define PRIoPTR  PRIo64
     45#define PRIuPTR  PRIu64
     46#define PRIxPTR  PRIx64
     47#define PRIXPTR  PRIX64
    7248
    7349#endif
  • uspace/lib/c/arch/arm32/include/inttypes.h

    r8b3bff5 rdc0b964  
    4141#define LIBC_arm32_INTTYPES_H_
    4242
    43 #define PRId8 "d"
    44 #define PRId16 "d"
    45 #define PRId32 "d"
    46 #define PRId64 "lld"
    47 #define PRIdPTR "d"
    48 
    49 #define PRIo8 "o"
    50 #define PRIo16 "o"
    51 #define PRIo32 "o"
    52 #define PRIo64 "llo"
    53 #define PRIoPTR "o"
    54 
    55 #define PRIu8 "u"
    56 #define PRIu16 "u"
    57 #define PRIu32 "u"
    58 #define PRIu64 "llu"
    59 #define PRIuPTR "u"
    60 
    61 #define PRIx8 "x"
    62 #define PRIx16 "x"
    63 #define PRIx32 "x"
    64 #define PRIx64 "llx"
    65 #define PRIxPTR "x"
    66 
    67 #define PRIX8 "X"
    68 #define PRIX16 "X"
    69 #define PRIX32 "X"
    70 #define PRIX64 "llX"
    71 #define PRIXPTR "X"
     43#define PRIdPTR  PRId32
     44#define PRIoPTR  PRIo32
     45#define PRIuPTR  PRIu32
     46#define PRIxPTR  PRIx32
     47#define PRIXPTR  PRIX32
    7248
    7349#endif
  • uspace/lib/c/arch/ia32/include/inttypes.h

    r8b3bff5 rdc0b964  
    4141#define LIBC_ia32_INTTYPES_H_
    4242
    43 #define PRId8 "d"
    44 #define PRId16 "d"
    45 #define PRId32 "d"
    46 #define PRId64 "lld"
    47 #define PRIdPTR "d"
    48 
    49 #define PRIo8 "o"
    50 #define PRIo16 "o"
    51 #define PRIo32 "o"
    52 #define PRIo64 "llo"
    53 #define PRIoPTR "o"
    54 
    55 #define PRIu8 "u"
    56 #define PRIu16 "u"
    57 #define PRIu32 "u"
    58 #define PRIu64 "llu"
    59 #define PRIuPTR "u"
    60 
    61 #define PRIx8 "x"
    62 #define PRIx16 "x"
    63 #define PRIx32 "x"
    64 #define PRIx64 "llx"
    65 #define PRIxPTR "x"
    66 
    67 #define PRIX8 "X"
    68 #define PRIX16 "X"
    69 #define PRIX32 "X"
    70 #define PRIX64 "llX"
    71 #define PRIXPTR "X"
     43#define PRIdPTR  PRId32
     44#define PRIoPTR  PRIo32
     45#define PRIuPTR  PRIu32
     46#define PRIxPTR  PRIx32
     47#define PRIXPTR  PRIX32
    7248
    7349#endif
  • uspace/lib/c/arch/ia64/include/inttypes.h

    r8b3bff5 rdc0b964  
    4141#define LIBC_ia64_INTTYPES_H_
    4242
    43 #define PRId8 "d"
    44 #define PRId16 "d"
    45 #define PRId32 "d"
    46 #define PRId64 "ld"
    47 #define PRIdPTR "ld"
    48 
    49 #define PRIo8 "o"
    50 #define PRIo16 "o"
    51 #define PRIo32 "o"
    52 #define PRIo64 "lo"
    53 #define PRIoPTR "lo"
    54 
    55 #define PRIu8 "u"
    56 #define PRIu16 "u"
    57 #define PRIu32 "u"
    58 #define PRIu64 "lu"
    59 #define PRIuPTR "lu"
    60 
    61 #define PRIx8 "x"
    62 #define PRIx16 "x"
    63 #define PRIx32 "x"
    64 #define PRIx64 "lx"
    65 #define PRIxPTR "lx"
    66 
    67 #define PRIX8 "X"
    68 #define PRIX16 "X"
    69 #define PRIX32 "X"
    70 #define PRIX64 "lX"
    71 #define PRIXPTR "lX"
     43#define PRIdPTR  PRId64
     44#define PRIoPTR  PRIo64
     45#define PRIuPTR  PRIu64
     46#define PRIxPTR  PRIx64
     47#define PRIXPTR  PRIX64
    7248
    7349#endif
  • uspace/lib/c/arch/mips32/include/inttypes.h

    r8b3bff5 rdc0b964  
    4141#define LIBC_mips32_INTTYPES_H_
    4242
    43 #define PRId8 "d"
    44 #define PRId16 "d"
    45 #define PRId32 "d"
    46 #define PRId64 "lld"
    47 #define PRIdPTR "d"
    48 
    49 #define PRIo8 "o"
    50 #define PRIo16 "o"
    51 #define PRIo32 "o"
    52 #define PRIo64 "llo"
    53 #define PRIoPTR "o"
    54 
    55 #define PRIu8 "u"
    56 #define PRIu16 "u"
    57 #define PRIu32 "u"
    58 #define PRIu64 "llu"
    59 #define PRIuPTR "u"
    60 
    61 #define PRIx8 "x"
    62 #define PRIx16 "x"
    63 #define PRIx32 "x"
    64 #define PRIx64 "llx"
    65 #define PRIxPTR "x"
    66 
    67 #define PRIX8 "X"
    68 #define PRIX16 "X"
    69 #define PRIX32 "X"
    70 #define PRIX64 "llX"
    71 #define PRIXPTR "x"
     43#define PRIdPTR  PRId32
     44#define PRIoPTR  PRIo32
     45#define PRIuPTR  PRIu32
     46#define PRIxPTR  PRIx32
     47#define PRIXPTR  PRIX32
    7248
    7349#endif
  • uspace/lib/c/arch/ppc32/include/inttypes.h

    r8b3bff5 rdc0b964  
    4141#define LIBC_ppc32_INTTYPES_H_
    4242
    43 #define PRId8 "d"
    44 #define PRId16 "d"
    45 #define PRId32 "d"
    46 #define PRId64 "lld"
    47 #define PRIdPTR "d"
    48 
    49 #define PRIo8 "o"
    50 #define PRIo16 "o"
    51 #define PRIo32 "o"
    52 #define PRIo64 "llo"
    53 #define PRIoPTR "o"
    54 
    55 #define PRIu8 "u"
    56 #define PRIu16 "u"
    57 #define PRIu32 "u"
    58 #define PRIu64 "llu"
    59 #define PRIuPTR "u"
    60 
    61 #define PRIx8 "x"
    62 #define PRIx16 "x"
    63 #define PRIx32 "x"
    64 #define PRIx64 "llx"
    65 #define PRIxPTR "x"
    66 
    67 #define PRIX8 "X"
    68 #define PRIX16 "X"
    69 #define PRIX32 "X"
    70 #define PRIX64 "llX"
    71 #define PRIXPTR "X"
     43#define PRIdPTR  PRId32
     44#define PRIoPTR  PRIo32
     45#define PRIuPTR  PRIu32
     46#define PRIxPTR  PRIx32
     47#define PRIXPTR  PRIX32
    7248
    7349#endif
  • uspace/lib/c/arch/sparc64/include/inttypes.h

    r8b3bff5 rdc0b964  
    4141#define LIBC_sparc64_INTTYPES_H_
    4242
    43 #define PRId8 "d"
    44 #define PRId16 "d"
    45 #define PRId32 "d"
    46 #define PRId64 "lld"
    47 #define PRIdPTR "lld"
    48 
    49 #define PRIo8 "o"
    50 #define PRIo16 "o"
    51 #define PRIo32 "o"
    52 #define PRIo64 "llo"
    53 #define PRIoPTR "llo"
    54 
    55 #define PRIu8 "u"
    56 #define PRIu16 "u"
    57 #define PRIu32 "u"
    58 #define PRIu64 "llu"
    59 #define PRIuPTR "llu"
    60 
    61 #define PRIx8 "x"
    62 #define PRIx16 "x"
    63 #define PRIx32 "x"
    64 #define PRIx64 "llx"
    65 #define PRIxPTR "llx"
    66 
    67 #define PRIX8 "X"
    68 #define PRIX16 "X"
    69 #define PRIX32 "X"
    70 #define PRIX64 "llX"
    71 #define PRIXPTR "llX"
     43#define PRIdPTR  PRId64
     44#define PRIoPTR  PRIo64
     45#define PRIuPTR  PRIu64
     46#define PRIxPTR  PRIx64
     47#define PRIXPTR  PRIX64
    7248
    7349#endif
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