Changeset cfa70add in mainline for uspace/libc/arch/sparc64/include/thread.h

Timestamp:

2006-09-03T23:37:14Z (19 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

fd85ae5

Parents:

002e613

Message:

sparc64 update.

• Prototype userspace layer implementation that at least relates to sparc64 and compiles cleanly.
• Fixes for kernel's preemptible_handler and code related to running userspace.
• Enable userspace. Several dozen instructions are now run in userspace! We are pretty near the userspace milestone for sparc64.

File:

• uspace/libc/arch/sparc64/include/thread.h (modified) (3 diffs)

uspace/libc/arch/sparc64/include/thread.h

@@ -1 +1 @@
 /*
- * Copyright (C) 2006 Martin Decky
+ * Copyright (C) 2006 Ondrej Palkovsky
+ * Copyright (C) 2006 Jakub Jermar
  * All rights reserved.
  *
@@ -27 +28 @@
  */
 
-/** @addtogroup libcsparc64     
+/** @addtogroup libcsparc64
  * @{
  */
-/** @file
+/**
+ * @file
+ * @brief       sparc64 TLS functions.
+ *
+ * The implementation is based on the IA-32 implementation which was also
+ * designed by Sun and is virtually the same, except the TCB is stored in
+ * %g7 (of the normal set).
  */
 
-#ifndef __LIBC__sparc64__THREAD_H__
-#define __LIBC__sparc64__THREAD_H__
-
-#define PPC_TP_OFFSET 0x7000
+#ifndef LIBC_sparc64_THREAD_H_
+#define LIBC_sparc64_THREAD_H_
 
 typedef struct {
+        void *self;
         void *pst_data;
 } tcb_t;
@@ -44 +50 @@
 static inline void __tcb_set(tcb_t *tcb)
 {
-        void *tp = tcb;
-        tp += PPC_TP_OFFSET + sizeof(tcb_t);
+        __asm__ volatile ("mov %0, %%g7\n" : : "r" (tcb) : "g7");
 }
 
-static inline tcb_t *__tcb_get(void)
+static inline tcb_t * __tcb_get(void)
 {
-        return (tcb_t *)(PPC_TP_OFFSET - sizeof(tcb_t));
+        void *retval;
+
+        __asm__ volatile ("mov %%g7, %0\n" : "=r" (retval));
+
+        return retval;
 }