Changeset ce031f0 in mainline for arch/mips32/src/mm/tlb.c
- Timestamp:
- 2005-10-04T11:23:21Z (20 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 8e3f47b3
- Parents:
- 1e2aecca
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
arch/mips32/src/mm/tlb.c
r1e2aecca rce031f0 33 33 #include <panic.h> 34 34 #include <arch.h> 35 #include <symtab.h> 35 36 36 #include <symtab.h> 37 void tlb_init_arch(void) 38 { 39 int i; 40 41 cp0_pagemask_write(TLB_PAGE_MASK_16K); 42 cp0_entry_hi_write(0); 43 cp0_entry_lo0_write(0); 44 cp0_entry_lo1_write(0); 45 46 /* 47 * Invalidate all entries. 48 */ 49 for (i = 0; i < TLB_SIZE; i++) { 50 cp0_index_write(0); 51 tlbwi(); 52 } 53 54 /* 55 * The kernel is going to make use of some wired 56 * entries (e.g. mapping kernel stacks). 57 */ 58 cp0_wired_write(TLB_WIRED); 59 } 37 60 38 61 void tlb_refill(struct exception_regdump *pstate) … … 47 70 if (s) 48 71 sym2 = s; 49 panic("%X: tlb_refill exception at %X(%s<-%s)\n", cp0_badvaddr_read(),50 pstate->epc, symbol, sym2);72 panic("%X: TLB Refill Exception at %X(%s<-%s)\n", cp0_badvaddr_read(), 73 pstate->epc, symbol, sym2); 51 74 } 52 75 … … 58 81 if (s) 59 82 symbol = s; 60 panic("%X: TLB exception at %X(%s)\n", cp0_badvaddr_read(),83 panic("%X: TLB Invalid Exception at %X(%s)\n", cp0_badvaddr_read(), 61 84 pstate->epc, symbol); 62 85 } 86 87 void tlb_modified(struct exception_regdump *pstate) 88 { 89 char *symbol = ""; 90 91 char *s = get_symtab_entry(pstate->epc); 92 if (s) 93 symbol = s; 94 panic("%X: TLB Modified Exception at %X(%s)\n", cp0_badvaddr_read(), 95 pstate->epc, symbol); 96 } 97 63 98 64 99 void tlb_invalidate(int asid)
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