Changeset c2b2de7 in mainline for uspace/drv/infrastructure/rootamdm37x/cm/core.h

Timestamp:

2012-10-17T22:17:29Z (13 years ago)

Author:

Maurizio Lombardi <m.lombardi85@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

150a2718

Parents:

6454ad47 (diff), 57912af3 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.

Message:

merge changes from bbxm branch

File:

• uspace/drv/infrastructure/rootamdm37x/cm/core.h (moved) (moved from uspace/drv/infrastructure/rootamdm37x/core_cm.h ) (5 diffs)

uspace/drv/infrastructure/rootamdm37x/cm/core.h

@@ -36 +36 @@
 #define AMDM37x_CORE_CM_H
 #include <sys/types.h>
+#include <macros.h>
 
 /* AM/DM37x TRM p.447 */
@@ -61 +62 @@
 #define CORE_CM_FCLKEN1_EN_MMC3_FLAG  (1 << 30)
 
-        uint32_t padd0_;
+        PADD32;
         ioport32_t fclken3;
 #define CORE_CM_FCLKEN3_EN_TS_FLAG  (1 << 1)
 #define CORE_CM_FCLKEN3_EN_USBTLL_FLAG  (1 << 2)
 
-        uint32_t padd1_;
+        PADD32;
         ioport32_t iclken1;
 #define CORE_CM_ICLKEN1_EN_SDRC_FLAG  (1 << 1)
@@ -95 +96 @@
 #define CORE_CM_ICLKEN3_EN_USBTLL_FLAG  (1 << 2)
 
-        uint32_t padd2_;
+        PADD32;
         const ioport32_t idlest1;
 #define CORE_CM_IDLEST1_ST_SDRC_FLAG  (1 << 1)
@@ -126 +127 @@
 #define CORE_CM_IDLEST3_ST_USBTLL_FLAG  (1 << 2)
 
-        uint32_t padd3_;
+        PADD32;
         ioport32_t autoidle1;
 #define CORE_CM_AUTOIDLE1_AUTO_HSOTGUSB_FLAG  (1 << 4)
@@ -154 +155 @@
 #define CORE_CM_AUTOIDLE3_AUTO_USBTLL_FLAG  (1 << 2)
 
-        uint32_t padd4_;
+        PADD32;
         ioport32_t clksel;
-#define CORE_CM_CLKSEL_CLKSEL_L3_MASK  0x3
-#define CORE_CM_CLKSEL_CLKSEL_L3_SHIFT  0
-#define CORE_CM_CLKSEL_CLKSEL_L3_DIVIDED1  0x1
-#define CORE_CM_CLKSEL_CLKSEL_L3_DIVIDED2  0x2
-#define CORE_CM_CLKSEL_CLKSEL_L4_MASK  0x3
-#define CORE_CM_CLKSEL_CLKSEL_L4_SHIFT  2
-#define CORE_CM_CLKSEL_CLKSEL_L4_DIVIDED1  0x1
-#define CORE_CM_CLKSEL_CLKSEL_L4_DIVIDED2  0x2
-#define CORE_CM_CLKSEL_CLKSEL_96M_MASK  0x3
-#define CORE_CM_CLKSEL_CLKSEL_96M_SHIFT  2
-#define CORE_CM_CLKSEL_CLKSEL_96M_DIVIDED1  0x1
-#define CORE_CM_CLKSEL_CLKSEL_96M_DIVIDED2  0x2
+#define CORE_CM_CLKSEL_CLKSEL_L3_MASK  (0x3 << 0)
+#define CORE_CM_CLKSEL_CLKSEL_L3_DIVIDED1  (0x1 << 0)
+#define CORE_CM_CLKSEL_CLKSEL_L3_DIVIDED2  (0x2 << 0)
+#define CORE_CM_CLKSEL_CLKSEL_L4_MASK  (0x3 << 2)
+#define CORE_CM_CLKSEL_CLKSEL_L4_DIVIDED1  (0x1 << 2)
+#define CORE_CM_CLKSEL_CLKSEL_L4_DIVIDED2  (0x2 << 2)
+#define CORE_CM_CLKSEL_CLKSEL_96M_MASK  (0x3 << 12)
+#define CORE_CM_CLKSEL_CLKSEL_96M_DIVIDED1  (0x1 << 12)
+#define CORE_CM_CLKSEL_CLKSEL_96M_DIVIDED2  (0x2 << 12)
 #define CORE_CM_CLKSEL_CLKSEL_GPT10_FLAG (1 << 6)
-#define CORE_CM_CLKSEL_CLKSEL_GPT11_FLAG (1 << 6)
+#define CORE_CM_CLKSEL_CLKSEL_GPT11_FLAG (1 << 7)
 
-        uint32_t padd5_;
+        PADD32;
         ioport32_t clkstctrl;
-#define CORE_CM_CLKCTRL_CLKCTRL_L3_MASK  0x3
-#define CORE_CM_CLKCTRL_CLKCTRL_L3_SHIFT  0
-#define CORE_CM_CLKCTRL_CLKCTRL_L3_AUTO_EN  0x0
-#define CORE_CM_CLKCTRL_CLKCTRL_L3_AUTO_DIS  0x3
-#define CORE_CM_CLKCTRL_CLKCTRL_L4_MASK  0x3
-#define CORE_CM_CLKCTRL_CLKCTRL_L4_SHIFT  2
-#define CORE_CM_CLKCTRL_CLKCTRL_L4_AUTO_EN  0x0
-#define CORE_CM_CLKCTRL_CLKCTRL_L4_AUTO_DIS  0x3
+#define CORE_CM_CLKCTRL_CLKCTRL_L3_MASK  (0x3 << 0)
+#define CORE_CM_CLKCTRL_CLKCTRL_L3_AUTO_EN  (0x0 << 0)
+#define CORE_CM_CLKCTRL_CLKCTRL_L3_AUTO_DIS  (0x3 << 0)
+#define CORE_CM_CLKCTRL_CLKCTRL_L4_MASK  (0x3 << 2)
+#define CORE_CM_CLKCTRL_CLKCTRL_L4_AUTO_EN  (0x0 << 2)
+#define CORE_CM_CLKCTRL_CLKCTRL_L4_AUTO_DIS  (0x3 << 2)
 
         const ioport32_t clkstst;
 #define CORE_CM_CLKSTST_CLKACTIVITY_L3_FLAG  (1 << 0)
 #define CORE_CM_CLKSTST_CLKACTIVITY_L4_FLAG  (1 << 1)
-
 } core_cm_regs_t;