Changeset bf677f6 in mainline for uspace/lib/c/arch/sparc32/src/fibril.S
- Timestamp:
- 2013-11-11T21:17:25Z (12 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 9426f7c4
- Parents:
- 679dc0c
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
uspace/lib/c/arch/sparc32/src/fibril.S
r679dc0c rbf677f6 39 39 # should a thread switch occur. 40 40 # 41 # XXXCONTEXT_SAVE_ARCH_CORE %o041 CONTEXT_SAVE_ARCH_CORE %o0 42 42 retl 43 43 mov 1, %o0 ! context_save_arch returns 1 … … 53 53 # flushw 54 54 55 # XXXCONTEXT_RESTORE_ARCH_CORE %o055 CONTEXT_RESTORE_ARCH_CORE %o0 56 56 retl 57 57 xor %o0, %o0, %o0 ! context_restore_arch returns 0
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