Changeset ba17f5b in mainline
- Timestamp:
- 2011-05-07T08:20:20Z (14 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- bd2394b
- Parents:
- 5f7b75a (diff), 6c6a95d2 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the(diff)
links above to see all the changes relative to each parent. - Files:
-
- 11 edited
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- Unmodified
- Added
- Removed
-
kernel/generic/include/ddi/irq.h
r5f7b75a rba17f5b 77 77 */ 78 78 CMD_PIO_WRITE_A_32, 79 79 80 /** Read 1 byte from the memory space. */ 81 CMD_MEM_READ_8, 82 /** Read 2 bytes from the memory space. */ 83 CMD_MEM_READ_16, 84 /** Read 4 bytes from the memory space. */ 85 CMD_MEM_READ_32, 86 87 /** Write 1 byte to the memory space. */ 88 CMD_MEM_WRITE_8, 89 /** Write 2 bytes to the memory space. */ 90 CMD_MEM_WRITE_16, 91 /** Write 4 bytes to the memory space. */ 92 CMD_MEM_WRITE_32, 93 94 /** Write 1 byte from the source argument to the memory space. */ 95 CMD_MEM_WRITE_A_8, 96 /** Write 2 bytes from the source argument to the memory space. */ 97 CMD_MEM_WRITE_A_16, 98 /** Write 4 bytes from the source argument to the memory space. */ 99 CMD_MEM_WRITE_A_32, 100 80 101 /** 81 102 * Perform a bit masking on the source argument … … 203 224 /** Notification configuration structure. */ 204 225 ipc_notif_cfg_t notif_cfg; 226 227 as_t *driver_as; 205 228 } irq_t; 206 229 -
kernel/generic/src/ipc/irq.c
r5f7b75a rba17f5b 174 174 irq->notif_cfg.code = code; 175 175 irq->notif_cfg.counter = 0; 176 irq->driver_as = AS; 176 177 177 178 /* … … 364 365 return IRQ_DECLINE; 365 366 367 #define CMD_MEM_READ(target) \ 368 do { \ 369 void *va = code->cmds[i].addr; \ 370 if (AS != irq->driver_as) \ 371 as_switch(AS, irq->driver_as); \ 372 printf("Copying data from address: %p.\n", va); \ 373 memcpy_from_uspace(&target, va, (sizeof(target))); \ 374 if (dstarg) \ 375 scratch[dstarg] = target; \ 376 } while(0) 377 378 #define CMD_MEM_WRITE(val) \ 379 do { \ 380 void *va = code->cmds[i].addr; \ 381 if (AS != irq->driver_as) \ 382 as_switch(AS, irq->driver_as); \ 383 printf("Writing data to address: %p.\n", va); \ 384 memcpy_to_uspace(va, &val, sizeof(val)); \ 385 } while (0) 386 387 as_t *current_as = AS; 366 388 size_t i; 367 389 for (i = 0; i < code->cmdcount; i++) { … … 422 444 } 423 445 break; 446 case CMD_MEM_READ_8: { 447 uint8_t val; 448 CMD_MEM_READ(val); 449 break; 450 } 451 case CMD_MEM_READ_16: { 452 uint16_t val; 453 CMD_MEM_READ(val); 454 break; 455 } 456 case CMD_MEM_READ_32: { 457 uint32_t val; 458 CMD_MEM_READ(val); 459 printf("mem READ value: %x.\n", val); 460 break; 461 } 462 case CMD_MEM_WRITE_8: { 463 uint8_t val = code->cmds[i].value; 464 CMD_MEM_WRITE(val); 465 break; 466 } 467 case CMD_MEM_WRITE_16: { 468 uint16_t val = code->cmds[i].value; 469 CMD_MEM_WRITE(val); 470 break; 471 } 472 case CMD_MEM_WRITE_32: { 473 uint32_t val = code->cmds[i].value; 474 CMD_MEM_WRITE(val); 475 break; 476 } 477 case CMD_MEM_WRITE_A_8: 478 if (srcarg) { 479 uint8_t val = scratch[srcarg]; 480 CMD_MEM_WRITE(val); 481 } 482 break; 483 case CMD_MEM_WRITE_A_16: 484 if (srcarg) { 485 uint16_t val = scratch[srcarg]; 486 CMD_MEM_WRITE(val); 487 } 488 break; 489 case CMD_MEM_WRITE_A_32: 490 if (srcarg) { 491 uint32_t val = scratch[srcarg]; 492 CMD_MEM_WRITE(val); 493 } 494 break; 424 495 case CMD_BTEST: 425 496 if ((srcarg) && (dstarg)) { … … 435 506 break; 436 507 case CMD_ACCEPT: 508 if (AS != current_as) 509 as_switch(AS, current_as); 437 510 return IRQ_ACCEPT; 438 511 case CMD_DECLINE: 439 512 default: 513 if (AS != current_as) 514 as_switch(AS, current_as); 440 515 return IRQ_DECLINE; 441 516 } 442 517 } 518 if (AS != current_as) 519 as_switch(AS, current_as); 443 520 444 521 return IRQ_DECLINE; -
uspace/drv/ehci-hcd/ehci-hcd.ma
r5f7b75a rba17f5b 2 2 10 pci/ven=1002&dev=4386 3 3 10 pci/ven=1002&dev=4396 4 10 pci/ven=1002&dev=4373 4 5 10 pci/ven=1022&dev=7463 5 6 10 pci/ven=1022&dev=7808 -
uspace/drv/ehci-hcd/pci.c
r5f7b75a rba17f5b 186 186 CHECK_RET_HANGUP_RETURN(ret, "Failed(%d) to read PCI config space.\n", 187 187 ret); 188 usb_log_info("Register space BAR at %p:%" PRIxn ".\n", (void *) address, value); 188 usb_log_info("Register space BAR at %p:%" PRIxn ".\n", 189 (void *) address, value); 189 190 190 191 /* clear lower byte, it's not part of the BASE address */ -
uspace/drv/ohci/hc.c
r5f7b75a rba17f5b 45 45 #include "hcd_endpoint.h" 46 46 47 #define OHCI_USED_INTERRUPTS \ 48 (I_SO | I_WDH | I_UE | I_RHSC) 47 49 static int interrupt_emulator(hc_t *instance); 48 50 static void hc_gain_control(hc_t *instance); … … 285 287 { 286 288 assert(instance); 287 if ((status & ~IS_SF) == 0) /* ignore sof status */ 289 usb_log_debug("OHCI interrupt: %x.\n", status); 290 if ((status & ~I_SF) == 0) /* ignore sof status */ 288 291 return; 289 if (status & I S_RHSC)292 if (status & I_RHSC) 290 293 rh_interrupt(&instance->rh); 291 294 292 usb_log_debug("OHCI interrupt: %x.\n", status); 293 294 if (status & IS_WDH) { 295 296 if (status & I_WDH) { 295 297 fibril_mutex_lock(&instance->guard); 296 298 usb_log_debug2("HCCA: %p-%#" PRIx32 " (%p).\n", instance->hcca, … … 332 334 { 333 335 assert(instance); 336 usb_log_debug("Requesting OHCI control.\n"); 334 337 /* Turn off legacy emulation */ 335 338 volatile uint32_t *ohci_emulation_reg = … … 337 340 usb_log_debug("OHCI legacy register %p: %x.\n", 338 341 ohci_emulation_reg, *ohci_emulation_reg); 339 *ohci_emulation_reg = 0;342 *ohci_emulation_reg &= ~0x1; 340 343 341 344 /* Interrupt routing enabled => smm driver is active */ … … 421 424 instance->registers->control); 422 425 423 /* Disable interrupts */ 424 instance->registers->interrupt_disable = I_SF | I_OC; 425 usb_log_debug2("Disabling interrupts: %x.\n", 426 instance->registers->interrupt_disable); 427 instance->registers->interrupt_disable = I_MI; 426 /* Enable interrupts */ 427 instance->registers->interrupt_enable = OHCI_USED_INTERRUPTS; 428 428 usb_log_debug2("Enabled interrupts: %x.\n", 429 429 instance->registers->interrupt_enable); 430 instance->registers->interrupt_enable = I_MI; 430 431 431 432 /* Set periodic start to 90% */ … … 492 493 instance->lists[USB_TRANSFER_INTERRUPT].list_head_pa); 493 494 495 /* Init interrupt code */ 496 instance->interrupt_code.cmds = instance->interrupt_commands; 497 { 498 /* Read status register */ 499 instance->interrupt_commands[0].cmd = CMD_MEM_READ_32; 500 instance->interrupt_commands[0].dstarg = 1; 501 instance->interrupt_commands[0].addr = 502 (void*)&instance->registers->interrupt_status; 503 504 /* Test whether we are the interrupt cause */ 505 instance->interrupt_commands[1].cmd = CMD_BTEST; 506 instance->interrupt_commands[1].value = 507 OHCI_USED_INTERRUPTS; 508 instance->interrupt_commands[1].srcarg = 1; 509 instance->interrupt_commands[1].dstarg = 2; 510 511 /* Predicate cleaning and accepting */ 512 instance->interrupt_commands[2].cmd = CMD_PREDICATE; 513 instance->interrupt_commands[2].value = 2; 514 instance->interrupt_commands[2].srcarg = 2; 515 516 /* Write clean status register */ 517 instance->interrupt_commands[3].cmd = CMD_MEM_WRITE_A_32; 518 instance->interrupt_commands[3].srcarg = 1; 519 instance->interrupt_commands[3].addr = 520 (void*)&instance->registers->interrupt_status; 521 522 /* Accept interrupt */ 523 instance->interrupt_commands[4].cmd = CMD_ACCEPT; 524 525 instance->interrupt_code.cmdcount = OHCI_NEEDED_IRQ_COMMANDS; 526 } 527 494 528 return EOK; 495 529 } -
uspace/drv/ohci/hc.h
r5f7b75a rba17f5b 51 51 #include "hw_struct/hcca.h" 52 52 53 #define OHCI_NEEDED_IRQ_COMMANDS 5 54 53 55 typedef struct hc { 54 56 ohci_regs_t *registers; … … 65 67 fid_t interrupt_emulator; 66 68 fibril_mutex_t guard; 69 70 /** Code to be executed in kernel interrupt handler */ 71 irq_code_t interrupt_code; 72 73 /** Commands that form interrupt code */ 74 irq_cmd_t interrupt_commands[OHCI_NEEDED_IRQ_COMMANDS]; 67 75 } hc_t; 68 76 -
uspace/drv/ohci/ohci.c
r5f7b75a rba17f5b 202 202 203 203 /* It does no harm if we register this on polling */ 204 ret = register_interrupt_handler(device, irq, irq_handler, NULL); 204 ret = register_interrupt_handler(device, irq, irq_handler, 205 &instance->hc.interrupt_code); 205 206 CHECK_RET_FINI_RETURN(ret, 206 207 "Failed(%d) to register interrupt handler.\n", ret); -
uspace/drv/ohci/ohci.ma
r5f7b75a rba17f5b 1 1 10 pci/ven=106b&dev=003f 2 2 10 pci/ven=10de&dev=0aa5 3 10 pci/ven=10de&dev=0aa5 3 4 10 pci/ven=1002&dev=4374 5 10 pci/ven=1002&dev=4375 6 7 10 pci/ven=1002&dev=4387 8 10 pci/ven=1002&dev=4388 9 10 pci/ven=1002&dev=4389 10 10 pci/ven=1002&dev=438a 11 10 pci/ven=1002&dev=438b -
uspace/drv/ohci/ohci_regs.h
r5f7b75a rba17f5b 72 72 #define CS_SOC_SHIFT (16) 73 73 74 /** Interupt enable/disable/status, 75 * reads give the same value, 76 * writing causes enable/disable, 77 * status is write-clean (writing 1 clears the bit*/ 74 78 volatile uint32_t interrupt_status; 75 #define IS_SO (1 << 0) /* Scheduling overrun */76 #define IS_WDH (1 << 1) /* Write-back done head */77 #define IS_SF (1 << 2) /* Start of frame */78 #define IS_RD (1 << 3) /* Resume detected */79 #define IS_UE (1 << 4) /* Unrecoverable error */80 #define IS_FNO (1 << 5) /* Frame number overflow */81 #define IS_RHSC (1 << 6) /* Root hub status change */82 #define IS_OC (1 << 30) /* Ownership change */83 84 /** Interupt enable/disable, reads give the same value, writing causes85 * enable/disable */86 79 volatile uint32_t interrupt_enable; 87 80 volatile uint32_t interrupt_disable; -
uspace/drv/ohci/pci.c
r5f7b75a rba17f5b 46 46 47 47 #include "pci.h" 48 49 #define PAGE_SIZE_MASK 0xfffff00050 51 #define HCC_PARAMS_OFFSET 0x852 #define HCC_PARAMS_EECP_MASK 0xff53 #define HCC_PARAMS_EECP_OFFSET 854 55 #define CMD_OFFSET 0x056 #define CONFIGFLAG_OFFSET 0x4057 58 #define USBCMD_RUN 159 60 #define USBLEGSUP_OFFSET 061 #define USBLEGSUP_BIOS_CONTROL (1 << 16)62 #define USBLEGSUP_OS_CONTROL (1 << 24)63 #define USBLEGCTLSTS_OFFSET 464 65 #define DEFAULT_WAIT 1000066 #define WAIT_STEP 1067 48 68 49 /** Get address of registers and IRQ for given device. … … 146 127 int pci_enable_interrupts(ddf_dev_t *device) 147 128 { 148 return ENOTSUP;149 129 int parent_phone = 150 130 devman_parent_device_connect(device->handle, IPC_FLAG_BLOCKING); -
uspace/lib/usb/src/host/batch.c
r5f7b75a rba17f5b 128 128 memcpy(instance->buffer, instance->data_buffer, instance->buffer_size); 129 129 130 usb_log_debug("Batch %pdone (T%d.%d, %s %s in, %zuB): %s (%d).\n",130 usb_log_debug("Batch(%p) done (T%d.%d, %s %s in, %zuB): %s (%d).\n", 131 131 instance, instance->ep->address, instance->ep->endpoint, 132 132 usb_str_speed(instance->ep->speed), 133 133 usb_str_transfer_type_short(instance->ep->transfer_type), 134 instance->transfered_size, str_error(instance->error), instance->error); 134 instance->transfered_size, str_error(instance->error), 135 instance->error); 135 136 136 137 instance->callback_in(instance->fun, instance->error, … … 147 148 assert(instance->callback_out); 148 149 149 usb_log_debug("Batch %pdone (T%d.%d, %s %s out): %s (%d).\n",150 usb_log_debug("Batch(%p) done (T%d.%d, %s %s out): %s (%d).\n", 150 151 instance, instance->ep->address, instance->ep->endpoint, 151 152 usb_str_speed(instance->ep->speed),
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