Changeset b3e8c90 in mainline for kernel/arch/sparc64/include/mm/mmu.h

Timestamp:

2006-08-01T11:24:27Z (19 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

e386cbf

Parents:

c049309

Message:

sparc64 work.

1. Formatting fixes.
2. When writing to DMMU ASI's, simple membar() can be used in place of flush().
3. Substantial changes in the way the TLB is taken over.
4. Remove unneeded functions.

This is the first revision that also runs on a real world Ultra 5 with UltraSPARC IIi
processor.

Note that 3. needs further work as the current implementation depends on the fact
that the compiler will use registers for local variables in take_over_tlb_and_tt().
Rewrite of that function into assembly is to follow.

File:

• kernel/arch/sparc64/include/mm/mmu.h (modified) (4 diffs)

kernel/arch/sparc64/include/mm/mmu.h

@@ -27 +27 @@
  */
 
- /** @addtogroup sparc64mm      
+/** @addtogroup sparc64mm       
  * @{
  */
@@ -35 +35 @@
 #ifndef __sparc64_MMU_H__
 #define __sparc64_MMU_H__
-
-#include <arch/asm.h>
-#include <arch/barrier.h>
-#include <arch/types.h>
-#include <typedefs.h>
 
 /** LSU Control Register ASI. */
@@ -80 +75 @@
 #define VA_DMMU_PA_WATCHPOINT_REG       0x40    /**< DMMU PA data watchpoint register. */
 
+#ifndef __ASM__
+
+#include <arch/asm.h>
+#include <arch/barrier.h>
+#include <arch/types.h>
+#include <typedefs.h>
 
 /** LSU Control Register. */
@@ -103 +104 @@
 typedef union lsu_cr_reg lsu_cr_reg_t;
 
-
-#define immu_enable()   immu_set(true)
-#define immu_disable()  immu_set(false)
-#define dmmu_enable()   dmmu_set(true)
-#define dmmu_disable()  dmmu_set(false)
-
-/** Disable or Enable IMMU. */
-static inline void immu_set(bool enable)
-{
-        lsu_cr_reg_t cr;
-        
-        cr.value = asi_u64_read(ASI_LSU_CONTROL_REG, 0);
-        cr.im = enable;
-        asi_u64_write(ASI_LSU_CONTROL_REG, 0, cr.value);
-        membar();
-}
-
-/** Disable or Enable DMMU. */
-static inline void dmmu_set(bool enable)
-{
-        lsu_cr_reg_t cr;
-        
-        cr.value = asi_u64_read(ASI_LSU_CONTROL_REG, 0);
-        cr.dm = enable;
-        asi_u64_write(ASI_LSU_CONTROL_REG, 0, cr.value);
-        membar();
-}
+#endif /* !__ASM__ */
 
 #endif
 
- /** @}
+/** @}
  */
-