Changeset 9d653e3 in mainline
- Timestamp:
- 2014-06-14T11:02:43Z (10 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 72d120e
- Parents:
- e37d2f81
- Location:
- uspace/drv/nic/rtl8169
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
uspace/drv/nic/rtl8169/defs.h
re37d2f81 r9d653e3 180 180 INT_RER = (1 << 1), /**< Receive error interrupt */ 181 181 INT_ROK = (1 << 0), /**< Receive OK interrupt */ 182 INT_KNOWN = (INT_SERR | INT_TIME_OUT | INT_SW | INT_TDU \ 183 | INT_FIFOOVW | INT_PUN | INT_RXOVW | INT_TER \ 184 | INT_TOK| INT_RER | INT_ROK), 182 185 }; 183 186 -
uspace/drv/nic/rtl8169/driver.c
re37d2f81 r9d653e3 27 27 */ 28 28 29 /* XXX Fix this */ 29 #define _DDF_DATA_IMPLANT 30 30 31 #include <assert.h> 31 32 #include <errno.h> … … 414 415 nic_set_ddf_fun(nic_data, fun); 415 416 ddf_fun_set_ops(fun, &rtl8169_dev_ops); 417 ddf_fun_data_implant(fun, nic_data); 416 418 417 419 rc = ddf_fun_bind(fun); … … 581 583 582 584 /* Configure Receive Control Register */ 583 pio_write_8(rtl8169->regs + 0x50, 0xc0);584 585 uint32_t rcr = pio_read_32(rtl8169->regs + RCR); 585 586 rcr |= RCR_ACCEPT_ALL_PHYS | RCR_ACCEPT_PHYS_MATCH \ … … 588 589 pio_write_32(rtl8169->regs + RCR, rcr); 589 590 pio_write_16(rtl8169->regs + RMS, BUFFER_SIZE); 590 pio_write_8(rtl8169->regs + 0x50, 0x00);591 591 592 592 ddf_msg(LVL_NOTE, "RCR: 0x%08x", pio_read_32(rtl8169->regs + RCR)); … … 753 753 assert(icall); 754 754 755 uint16_t isr = (uint16_t) IPC_GET_ARG2(*icall) ;755 uint16_t isr = (uint16_t) IPC_GET_ARG2(*icall) & INT_KNOWN; 756 756 nic_t *nic_data = nic_get_from_ddf_dev(dev); 757 757 rtl8169_t *rtl8169 = nic_get_specific(nic_data); … … 759 759 ddf_msg(LVL_NOTE, "rtl8169_irq_handler(): isr=0x%04x", isr); 760 760 761 /* Packet underrun or link change */ 762 if (isr & INT_PUN) 763 rtl8169_link_change(dev); 764 765 /* Transmit notification */ 766 if (isr & (INT_TER | INT_TOK | INT_TDU)) 767 rtl8169_transmit_done(dev); 768 769 if (isr & INT_SERR) 770 ddf_msg(LVL_ERROR, "System error interrupt"); 771 772 if (isr & (INT_RER | INT_ROK)) 773 rtl8169_receive_done(dev); 774 761 while (isr != 0) { 762 /* Packet underrun or link change */ 763 if (isr & INT_PUN) { 764 rtl8169_link_change(dev); 765 pio_write_16(rtl8169->regs + ISR, INT_PUN); 766 } 767 768 /* Transmit notification */ 769 if (isr & (INT_TER | INT_TOK | INT_TDU)) { 770 rtl8169_transmit_done(dev); 771 pio_write_16(rtl8169->regs + ISR, (INT_TER | INT_TOK | INT_TDU)); 772 } 773 774 if (isr & INT_SERR) { 775 ddf_msg(LVL_ERROR, "System error interrupt"); 776 pio_write_16(rtl8169->regs + ISR, INT_SERR); 777 } 778 779 if (isr & (INT_RER | INT_ROK)) { 780 rtl8169_receive_done(dev); 781 pio_write_16(rtl8169->regs + ISR, (INT_RER | INT_ROK)); 782 } 783 784 isr = pio_read_16(rtl8169->regs + ISR) & INT_KNOWN; 785 } 786 787 pio_write_16(rtl8169->regs + IMR, 0xffff); 775 788 pio_write_16(rtl8169->regs + ISR, 0xffff); 776 pio_write_16(rtl8169->regs + IMR, 0xffff);777 789 } 778 790 … … 835 847 /* Notify NIC of pending packets */ 836 848 pio_write_8(rtl8169->regs + TPPOLL, TPPOLL_NPQ); 849 write_barrier(); 850 851 ddf_msg(LVL_NOTE, "triggered TPPOLL"); 837 852 838 853 fibril_mutex_unlock(&rtl8169->tx_lock);
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