Changeset 949869d in mainline
- Timestamp:
- 2012-12-29T23:23:01Z (12 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 5d9e36b
- Parents:
- 2826998
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
boot/arch/arm32/src/mm.c
r2826998 r949869d 120 120 121 121 #ifdef PROCESSOR_armv7_a 122 /* Mask to enable paging, I-cache D-cache 122 /* Mask to enable paging, I-cache D-cache and branch predict 123 123 * See kernel/arch/arm32/include/regutils.h for bit values.*/ 124 "ldr r1, =0x00001 005\n"124 "ldr r1, =0x00001805\n" 125 125 #else 126 126 /* Mask to enable paging */ -
kernel/arch/arm32/src/cpu/cpu.c
r2826998 r949869d 129 129 control_reg |= CP15_R1_CACHE_EN | CP15_R1_INST_CACHE_EN; 130 130 131 /* Enable branch prediction */ 132 control_reg |= CP15_R1_BRANCH_PREDICT_EN; 131 133 asm volatile ( 132 134 "mcr p15, 0, %[control_reg], c1, c0"
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