Changeset 2826998 in mainline
- Timestamp:
- 2012-12-29T23:15:40Z (12 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 949869d
- Parents:
- 26e550c2
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
boot/arch/arm32/src/mm.c
r26e550c2 r2826998 120 120 121 121 #ifdef PROCESSOR_armv7_a 122 /* Mask to enable paging, caching */ 123 "ldr r1, =0x00000005\n" 122 /* Mask to enable paging, I-cache D-cache 123 * See kernel/arch/arm32/include/regutils.h for bit values.*/ 124 "ldr r1, =0x00001005\n" 124 125 #else 125 126 /* Mask to enable paging */ -
kernel/arch/arm32/include/regutils.h
r26e550c2 r2826998 47 47 #define CP15_R1_CACHE_EN (1 << 2) 48 48 #define CP15_R1_CP15_BARRIER_EN (1 << 5) 49 #define CP15_R1_B_EN (1 << 7) /* ARMv6- only big endian switch */49 #define CP15_R1_B_EN (1 << 7) /* ARMv6- only, big endian switch */ 50 50 #define CP15_R1_SWAP_EN (1 << 10) 51 51 #define CP15_R1_BRANCH_PREDICT_EN (1 << 11) -
kernel/arch/arm32/src/cpu/cpu.c
r26e550c2 r2826998 105 105 ); 106 106 107 /* Turn off tex remap, RAZ ignores writesprior to armv7 */107 /* Turn off tex remap, RAZ/WI prior to armv7 */ 108 108 control_reg &= ~CP15_R1_TEX_REMAP_EN; 109 /* Turn off accessed flag, RAZ ignores writesprior to armv7 */109 /* Turn off accessed flag, RAZ/WI prior to armv7 */ 110 110 control_reg &= ~(CP15_R1_ACCESS_FLAG_EN | CP15_R1_HW_ACCESS_FLAG_EN); 111 /* Enable unaligned access, RAZ ignores writesprior to armv6112 * switchable on armv6, RAO ignoreswrites on armv7,111 /* Enable unaligned access, RAZ/WI prior to armv6 112 * switchable on armv6, RAO/WI writes on armv7, 113 113 * see ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition 114 114 * L.3.1 (p. 2456) */
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