Changeset 9043309c in mainline for kernel/arch/ia64/src/mm/tlb.c
- Timestamp:
- 2012-11-18T00:10:02Z (12 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 7ad17de
- Parents:
- 6f5e213
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/ia64/src/mm/tlb.c
r6f5e213 r9043309c 113 113 va = page; 114 114 115 rr.word = rr_read(VA2VRN( va));116 if ((restore_rr = (rr.map.rid != ASID2RID(asid, VA2VRN( va))))) {115 rr.word = rr_read(VA2VRN(page)); 116 if ((restore_rr = (rr.map.rid != ASID2RID(asid, VA2VRN(page))))) { 117 117 /* 118 118 * The selected region register does not contain required RID. … … 122 122 123 123 rr0 = rr; 124 rr0.map.rid = ASID2RID(asid, VA2VRN( va));125 rr_write(VA2VRN( va), rr0.word);124 rr0.map.rid = ASID2RID(asid, VA2VRN(page)); 125 rr_write(VA2VRN(page), rr0.word); 126 126 srlz_d(); 127 127 srlz_i(); … … 139 139 case 1: /* cnt 4 - 15 */ 140 140 ps = PAGE_WIDTH + 2; 141 va &= ~((1 << ps) - 1);141 va &= ~((1UL << ps) - 1); 142 142 break; 143 143 case 2: /* cnt 16 - 63 */ 144 144 ps = PAGE_WIDTH + 4; 145 va &= ~((1 << ps) - 1);145 va &= ~((1UL << ps) - 1); 146 146 break; 147 147 case 3: /* cnt 64 - 255 */ 148 148 ps = PAGE_WIDTH + 6; 149 va &= ~((1 << ps) - 1);149 va &= ~((1UL << ps) - 1); 150 150 break; 151 151 case 4: /* cnt 256 - 1023 */ 152 152 ps = PAGE_WIDTH + 8; 153 va &= ~((1 << ps) - 1);153 va &= ~((1UL << ps) - 1); 154 154 break; 155 155 case 5: /* cnt 1024 - 4095 */ 156 156 ps = PAGE_WIDTH + 10; 157 va &= ~((1 << ps) - 1);157 va &= ~((1UL << ps) - 1); 158 158 break; 159 159 case 6: /* cnt 4096 - 16383 */ 160 160 ps = PAGE_WIDTH + 12; 161 va &= ~((1 << ps) - 1);161 va &= ~((1UL << ps) - 1); 162 162 break; 163 163 case 7: /* cnt 16384 - 65535 */ 164 164 case 8: /* cnt 65536 - (256K - 1) */ 165 165 ps = PAGE_WIDTH + 14; 166 va &= ~((1 << ps) - 1);166 va &= ~((1UL << ps) - 1); 167 167 break; 168 168 default: 169 169 ps = PAGE_WIDTH + 18; 170 va &= ~((1 << ps) - 1);170 va &= ~((1UL << ps) - 1); 171 171 break; 172 172 } 173 173 174 for (; va < (page + cnt * PAGE_SIZE); va += (1 << ps))174 for (; va < (page + cnt * PAGE_SIZE); va += (1UL << ps)) 175 175 asm volatile ( 176 176 "ptc.l %[va], %[ps] ;;" … … 183 183 184 184 if (restore_rr) { 185 rr_write(VA2VRN( va), rr.word);185 rr_write(VA2VRN(page), rr.word); 186 186 srlz_d(); 187 187 srlz_i();
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