Changeset 8c877b2 in mainline for uspace/drv/pciintel/pci.c

Timestamp:

2011-03-04T13:05:35Z (14 years ago)

Author:

Matus Dekanek <smekideki@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

d49728c

Parents:

dff940f8 (diff), 9a422574 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.

Message:

merge with \usb\development

File:

• uspace/drv/pciintel/pci.c (modified) (10 diffs)

uspace/drv/pciintel/pci.c

@@ -59 +59 @@
 #include <ddi.h>
 #include <libarch/ddi.h>
+#include <pci_dev_iface.h>
 
 #include "pci.h"
@@ -93 +94 @@
   sysarg_t apic;
   sysarg_t i8259;
+
         int irc_phone = -1;
         int irc_service = 0;
@@ -102 +104 @@
         }
 
-  if (irc_service) {
-    while (irc_phone < 0)
-      irc_phone = service_connect_blocking(irc_service, 0, 0);
-  } else {
+  if (irc_service == 0)
                 return false;
-        }
+
+        irc_phone = service_connect_blocking(irc_service, 0, 0);
+        if (irc_phone < 0)
+                return false;
 
         size_t i;
@@ -113 +115 @@
                 if (dev_data->hw_resources.resources[i].type == INTERRUPT) {
                         int irq = dev_data->hw_resources.resources[i].res.interrupt.irq;
-                        async_msg_1(irc_phone, IRC_ENABLE_INTERRUPT, irq);
+                        int rc = async_req_1_0(irc_phone, IRC_ENABLE_INTERRUPT, irq);
+                        if (rc != EOK) {
+                                async_hangup(irc_phone);
+                                return false;
+                        }
                 }
         }
@@ -120 +126 @@
         return true;
 }
+
+static int pci_config_space_write_16(ddf_fun_t *fun, uint32_t address, uint16_t data)
+{
+        if (address > 254)
+                return EINVAL;
+        pci_conf_write_16(PCI_FUN(fun), address, data);
+        return EOK;
+}
+
 
 static hw_res_ops_t pciintel_hw_res_ops = {
@@ -126 +141 @@
 };
 
-static ddf_dev_ops_t pci_fun_ops;
+static pci_dev_iface_t pci_dev_ops = {
+        .config_space_read_8 = NULL,
+        .config_space_read_16 = NULL,
+        .config_space_read_32 = NULL,
+        .config_space_write_8 = NULL,
+        .config_space_write_16 = &pci_config_space_write_16,
+        .config_space_write_32 = NULL
+};
+
+static ddf_dev_ops_t pci_fun_ops = {
+        .interfaces[HW_RES_DEV_IFACE] = &pciintel_hw_res_ops,
+        .interfaces[PCI_DEV_IFACE] = &pci_dev_ops
+};
 
 static int pci_add_device(ddf_dev_t *);
@@ -320 +347 @@
         /* Get the value of the BAR. */
         val = pci_conf_read_32(fun, addr);
+
+#define IO_MASK  (~0x3)
+#define MEM_MASK (~0xf)
         
         io = (bool) (val & 1);
         if (io) {
                 addrw64 = false;
+                mask = IO_MASK;
         } else {
+                mask = MEM_MASK;
                 switch ((val >> 1) & 3) {
                 case 0:
@@ -340 +372 @@
         /* Get the address mask. */
         pci_conf_write_32(fun, addr, 0xffffffff);
-        mask = pci_conf_read_32(fun, addr);
+        mask &= pci_conf_read_32(fun, addr);
         
         /* Restore the original value. */
@@ -588 +620 @@
 {
         pci_fun_ops.interfaces[HW_RES_DEV_IFACE] = &pciintel_hw_res_ops;
+        pci_fun_ops.interfaces[PCI_DEV_IFACE] = &pci_dev_ops;
 }
 
@@ -659 +692 @@
 size_t pci_bar_mask_to_size(uint32_t mask)
 {
-        return ((mask & 0xfffffff0) ^ 0xffffffff) + 1;
+        size_t size = mask & ~(mask - 1);
+        return size;
 }