Changeset 8ac5fe7 in mainline for arch/sparc64/include/asm.h
- Timestamp:
- 2005-12-02T16:18:23Z (20 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 060ce90
- Parents:
- 414f59c
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
arch/sparc64/include/asm.h
r414f59c r8ac5fe7 86 86 } 87 87 88 /** Read Trap Base Address register. 89 * 90 * @return Current value in TBA. 91 */ 92 static inline __u64 tba_read(void) 93 { 94 __u64 v; 95 96 __asm__ volatile ("rdpr %%tba, %0\n" : "=r" (v)); 97 98 return v; 99 } 100 101 /** Write Trap Base Address register. 102 * 103 * @param New value of TBA. 104 */ 105 static inline void tba_write(__u64 v) 106 { 107 __asm__ volatile ("wrpr %0, %1, %%tba\n" : : "r" (v), "i" (0)); 108 } 109 110 88 111 void cpu_halt(void); 89 112 void cpu_sleep(void);
Note:
See TracChangeset
for help on using the changeset viewer.