Changeset 8a64320e in mainline for uspace/drv/nic/ar9271/ar9271.h
- Timestamp:
- 2015-04-23T23:40:14Z (10 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- dcba819
- Parents:
- 09044cb
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
uspace/drv/nic/ar9271/ar9271.h
r09044cb r8a64320e 37 37 38 38 #include <usb/dev/driver.h> 39 40 39 #include "htc.h" 41 40 42 41 /** Number of transmission queues */ 43 #define AR9271_QUEUES_COUNT 1042 #define AR9271_QUEUES_COUNT 10 44 43 45 44 /** Number of GPIO pin used for handling led light */ 46 #define AR9271_LED_PIN 1545 #define AR9271_LED_PIN 15 47 46 48 47 /** Nominal value for AR9271 noise floor calibration. */ 49 #define AR9271_CALIB_NOMINAL_VALUE_2GHZ -11848 #define AR9271_CALIB_NOMINAL_VALUE_2GHZ -118 50 49 51 50 /** RX errors values. */ 52 #define AR9271_RX_ERROR_CRC 0x0153 #define AR9271_RX_ERROR_PHY 0x0251 #define AR9271_RX_ERROR_CRC 0x01 52 #define AR9271_RX_ERROR_PHY 0x02 54 53 55 54 /** Key index used for device in station mode. */ 56 #define AR9271_STA_KEY_INDEX 455 #define AR9271_STA_KEY_INDEX 4 57 56 58 57 /* HW encryption key indicator. */ … … 83 82 AR9271_RC = 0x4000, 84 83 AR9271_RC_AHB = 0x00000001, 85 84 86 85 /* GPIO registers */ 87 AR9271_GPIO_IN_OUT = 0x4048, 88 AR9271_GPIO_OE_OUT = 0x404C, 89 AR9271_GPIO_OE_OUT_ALWAYS = 0x3, 86 AR9271_GPIO_IN_OUT = 0x4048, /**< GPIO value read/set */ 87 AR9271_GPIO_OE_OUT = 0x404C, /**< GPIO set to output */ 88 AR9271_GPIO_OE_OUT_ALWAYS = 0x3, /**< GPIO always drive output */ 90 89 AR9271_GPIO_OUT_MUX1 = 0x4060, 91 90 AR9271_GPIO_OUT_MUX2 = 0x4064, 92 91 AR9271_GPIO_OUT_MUX3 = 0x4068, 93 AR9271_GPIO_OUT_MUX_AS_OUT = 0x0, 94 92 AR9271_GPIO_OUT_MUX_AS_OUT = 0x0, /**< GPIO set mux as output */ 93 95 94 /* RTC related registers */ 96 95 AR9271_RTC_RC = 0x7000, … … 109 108 AR9271_RTC_FORCE_WAKE_ENABLE = 0x00000001, 110 109 AR9271_RTC_FORCE_WAKE_ON_INT = 0x00000002, 111 110 112 111 /* MAC Registers */ 113 AR9271_STATION_ID0 = 0x8000, 114 AR9271_STATION_ID1 = 0x8004, 115 AR9271_BSSID0 = 0x8008, 116 AR9271_BSSID1 = 0x800C, 117 AR9271_BSSID_MASK0 = 0x80E0, 118 AR9271_BSSID_MASK1 = 0x80E4, 112 AR9271_STATION_ID0 = 0x8000, /**< STA Address Lower 32 Bits */ 113 AR9271_STATION_ID1 = 0x8004, /**< STA Address Upper 16 Bits */ 114 AR9271_BSSID0 = 0x8008, /**< BSSID Lower 32 Bits */ 115 AR9271_BSSID1 = 0x800C, /**< BSSID Upper 16 Bits */ 116 AR9271_BSSID_MASK0 = 0x80E0, /**< BSSID Mask Lower 32 Bits */ 117 AR9271_BSSID_MASK1 = 0x80E4, /**< BSSID Mask Upper 16 Bits */ 119 118 AR9271_STATION_ID1_MASK = 0x0000FFFF, 120 119 AR9271_STATION_ID1_POWER_SAVING = 0x00040000, 121 120 AR9271_MULTICAST_FILTER1 = 0x8040, 122 AR9271_MULTICAST_FILTER2 = 0x8044, 121 AR9271_MULTICAST_FILTER2 = 0x8044, 123 122 AR9271_DIAG = 0x8048, 124 123 125 124 /* RX filtering register */ 126 125 AR9271_RX_FILTER = 0x803C, … … 134 133 AR9271_RX_FILTER_MYBEACON = 0x00000200, 135 134 AR9271_RX_FILTER_MCAST_BCAST_ALL = 0x00008000, 136 135 137 136 /* Key related registers */ 138 137 AR9271_KEY_TABLE_BASE = 0x8800, … … 142 141 AR9271_KEY_TABLE_TYPE_CCMP = 0x6, 143 142 AR9271_KEY_TABLE_TYPE_CLR = 0x7, 144 143 145 144 /* Physical layer registers */ 146 145 AR9271_PHY_ACTIVE = 0x981C, … … 168 167 AR9271_PHY_TPCRG1_PD_CALIB = 0x00400000, 169 168 AR9271_CARRIER_LEAK_CALIB = 0x00000002, 170 169 171 170 AR9271_OPMODE_STATION_AP_MASK = 0x00010000, 172 171 AR9271_OPMODE_ADHOC_MASK = 0x00020000, 173 172 174 173 AR9271_CLOCK_CONTROL = 0x50040, 175 174 AR9271_MAX_CPU_CLOCK = 0x304, 176 175 177 176 AR9271_RESET_POWER_DOWN_CONTROL = 0x50044, 178 177 AR9271_RADIO_RF_RESET = 0x20, 179 178 AR9271_GATE_MAC_CONTROL = 0x4000, 180 179 181 180 /* FW Addresses */ 182 181 AR9271_FW_ADDRESS = 0x501000, … … 185 184 186 185 /** Compute key table base position for key by its id. */ 187 #define AR9271_KEY_TABLE(id) (AR9271_KEY_TABLE_BASE + (id)*32)186 #define AR9271_KEY_TABLE(id) (AR9271_KEY_TABLE_BASE + (id) * 32) 188 187 189 188 /** AR9271 Requests */ … … 217 216 } ar9271_t; 218 217 219 /** 220 * AR9271 init values for 2GHz mode operation. 221 * 218 /** AR9271 init values for 2GHz mode operation. 219 * 222 220 * Including settings of noise floor limits. 223 * 224 * Taken from Linux sources. 221 * 222 * Taken from the Linux driver (drivers/net/wireless/ath/ath9k/) 223 * Copyright (c) 2008-2011 Atheros Communications Inc. 224 * Licensed under the terms of ISC 225 * 225 226 */ 226 227 static const uint32_t ar9271_2g_mode_array[][2] = { … … 232 233 {0x0000801c, 0x12e0002b}, 233 234 {0x00008318, 0x00003440}, 234 {0x00009804, 0x000003c0}, /*< note: overridden */235 {0x00009804, 0x000003c0}, /*< Note: overridden */ 235 236 {0x00009820, 0x02020200}, 236 237 {0x00009824, 0x01000e0e}, 237 {0x00009828, 0x0a020001}, /*< note: overridden */238 {0x00009828, 0x0a020001}, /*< Note: overridden */ 238 239 {0x00009834, 0x00000e0e}, 239 240 {0x00009838, 0x00000007}, … … 530 531 }; 531 532 532 /** 533 * AR9271 TX init values for 2GHz mode operation. 534 * 535 * Taken from Linux sources. 533 /** AR9271 TX init values for 2GHz mode operation. 534 * 535 * Taken from the Linux driver (drivers/net/wireless/ath/ath9k/) 536 * Copyright (c) 2008-2011 Atheros Communications Inc. 537 * Licensed under the terms of ISC 538 * 536 539 */ 537 540 static const uint32_t ar9271_2g_tx_array[][2] = { … … 571 574 }; 572 575 573 /** 574 * AR9271 hardware init values. 575 * 576 * Taken from Linux sources, some values omitted. 576 /** AR9271 hardware init values. 577 * 578 * Taken from the Linux driver (drivers/net/wireless/ath/ath9k/) 579 * Copyright (c) 2008-2011 Atheros Communications Inc. 580 * Licensed under the terms of ISC 581 * 577 582 */ 578 583 static const uint32_t ar9271_init_array[][2] = { … … 766 771 {0x0000833c, 0x00000000}, 767 772 {0x00008340, 0x00010380}, 768 {0x00008344, 0x00481083}, /*< note: disabled ADHOC_MCAST_KEYID feature */773 {0x00008344, 0x00481083}, /**< Note: disabled ADHOC_MCAST_KEYID feature */ 769 774 {0x00007010, 0x00000030}, 770 775 {0x00007034, 0x00000002},
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