Changeset 89c57b6 in mainline for kernel/arch/mips32/include/cp0.h

Timestamp:

2011-04-13T14:45:41Z (14 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

88634420

Parents:

cefb126 (diff), 17279ead (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.

Message:

Merge mainline changes.

File:

• kernel/arch/mips32/include/cp0.h (modified) (3 diffs)

kernel/arch/mips32/include/cp0.h

@@ -36 +36 @@
 #define KERN_mips32_CP0_H_
 
+#ifdef KERNEL
 #include <typedefs.h>
+#else
+#include <sys/types.h>
+#endif
 
 #define cp0_status_ie_enabled_bit     (1 << 0)
@@ -66 +70 @@
   { \
       uint32_t retval; \
-      asm("mfc0 %0, $" #reg : "=r"(retval)); \
+      asm volatile ("mfc0 %0, $" #reg : "=r"(retval)); \
       return retval; \
   }
@@ -72 +76 @@
 #define GEN_WRITE_CP0(nm,reg) static inline void cp0_ ##nm##_write(uint32_t val) \
  { \
-    asm("mtc0 %0, $" #reg : : "r"(val) ); \
+    asm volatile ("mtc0 %0, $" #reg : : "r"(val) ); \
  }