Changeset 89344d85 in mainline for arch/amd64/include/cpuid.h

Timestamp:

2005-09-03T00:19:23Z (20 years ago)

Author:

Ondrej Palkovsky <ondrap@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

36b209a

Parents:

e4a6dda

Message:

Changes, that were needed to make it work on Bochs.

• We CAN use the NX bit in paging tables, but we have

to initialize the NXE bit in EFER register first.

File:

• arch/amd64/include/cpuid.h (modified) (2 diffs)

arch/amd64/include/cpuid.h

@@ -32 +32 @@
 #include <arch/types.h>
 
+#define AMD_CPUID_EXTENDED 0x80000001
+#define AMD_EXT_NOEXECUTE    20
+
 struct cpu_info {
         __u32 cpuid_eax;
@@ -41 +44 @@
 extern int has_cpuid(void);
 
-static inline void cpuid(__u32 cmd, cpu_info_t *info)
-{
-        __asm__ (
-                "movl %1, %eax"
-                "cpuid"
-                "movl %eax, 0(%0)"
-                "movl %ebx, 4(%0)"
-                "movl %ecx, 8(%0)"
-                "movl %edx, 12(%0)"
-                : "=m"(info)
-                : "r"(cmd)
-                : "%eax","%ebx","%ecx","%edx"
-                );
-}
+extern void cpuid(__u32 cmd, cpu_info_t *info);
+
 
 extern __u64 rdtsc(void);