Changeset 8033f89 in mainline for uspace/drv/bus/usb/xhci/hw_struct/regs.h
- Timestamp:
- 2018-01-23T12:41:22Z (8 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- e7e1fd3
- Parents:
- e546142
- File:
-
- 1 edited
-
uspace/drv/bus/usb/xhci/hw_struct/regs.h (modified) (8 diffs)
Legend:
- Unmodified
- Added
- Removed
-
uspace/drv/bus/usb/xhci/hw_struct/regs.h
re546142 r8033f89 84 84 * Field handling is the easiest. Just do it with whole field. 85 85 */ 86 #define XHCI_REG_RD_FIELD(ptr, size) xhci2host(size, pio_read_##size((ptr))) 87 #define XHCI_REG_WR_FIELD(ptr, value, size) pio_write_##size((ptr), host2xhci(size, value)) 88 #define XHCI_REG_SET_FIELD(ptr, value, size) pio_set_##size((ptr), host2xhci(size, value), XHCI_PIO_CHANGE_UDELAY); 89 #define XHCI_REG_CLR_FIELD(ptr, value, size) pio_clear_##size((ptr), host2xhci(size, value), XHCI_PIO_CHANGE_UDELAY); 86 #define XHCI_REG_RD_FIELD(ptr, size) \ 87 xhci2host(size, pio_read_##size((ptr))) 88 #define XHCI_REG_WR_FIELD(ptr, value, size) \ 89 pio_write_##size((ptr), host2xhci(size, value)) 90 #define XHCI_REG_SET_FIELD(ptr, value, size) \ 91 pio_set_##size((ptr), host2xhci(size, value), XHCI_PIO_CHANGE_UDELAY); 92 #define XHCI_REG_CLR_FIELD(ptr, value, size) \ 93 pio_clear_##size((ptr), host2xhci(size, value), XHCI_PIO_CHANGE_UDELAY); 90 94 #define XHCI_REG_MASK_FIELD(size) (~((uint##size##_t) 0)) 91 95 #define XHCI_REG_SHIFT_FIELD(size) (0) … … 94 98 * Flags are just trivial case of ranges. 95 99 */ 96 #define XHCI_REG_RD_FLAG(ptr, size, offset) XHCI_REG_RD_RANGE((ptr), size, (offset), (offset)) 97 #define XHCI_REG_WR_FLAG(ptr, value, size, offset) XHCI_REG_WR_RANGE((ptr), (value), size, (offset), (offset)) 98 #define XHCI_REG_SET_FLAG(ptr, value, size, offset) XHCI_REG_SET_RANGE((ptr), (value), size, (offset), (offset)) 99 #define XHCI_REG_CLR_FLAG(ptr, value, size, offset) XHCI_REG_CLR_RANGE((ptr), (value), size, (offset), (offset)) 100 #define XHCI_REG_RD_FLAG(ptr, size, offset) \ 101 XHCI_REG_RD_RANGE((ptr), size, (offset), (offset)) 102 #define XHCI_REG_WR_FLAG(ptr, value, size, offset) \ 103 XHCI_REG_WR_RANGE((ptr), (value), size, (offset), (offset)) 104 #define XHCI_REG_SET_FLAG(ptr, value, size, offset) \ 105 XHCI_REG_SET_RANGE((ptr), (value), size, (offset), (offset)) 106 #define XHCI_REG_CLR_FLAG(ptr, value, size, offset) \ 107 XHCI_REG_CLR_RANGE((ptr), (value), size, (offset), (offset)) 100 108 #define XHCI_REG_MASK_FLAG(size, offset) BIT_V(uint##size##_t, offset) 101 109 #define XHCI_REG_SHIFT_FLAG(size, offset) (offset) … … 108 116 109 117 #define XHCI_REG_WR_RANGE(ptr, value, size, hi, lo) \ 110 pio_change_##size((ptr), host2xhci(size, BIT_RANGE_INSERT(uint##size##_t, (hi), (lo), (value))), \ 118 pio_change_##size((ptr), host2xhci(size, BIT_RANGE_INSERT(uint##size##_t, \ 119 (hi), (lo), (value))), \ 111 120 host2xhci(size, BIT_RANGE(uint##size##_t, (hi), (lo))), \ 112 121 XHCI_PIO_CHANGE_UDELAY); 113 122 114 123 #define XHCI_REG_SET_RANGE(ptr, value, size, hi, lo) \ 115 pio_set_##size((ptr), host2xhci(size, BIT_RANGE_INSERT(uint##size##_t, (hi), (lo), (value))), \ 124 pio_set_##size((ptr), host2xhci(size, BIT_RANGE_INSERT(uint##size##_t, \ 125 (hi), (lo), (value))), \ 116 126 XHCI_PIO_CHANGE_UDELAY); 117 127 118 128 #define XHCI_REG_CLR_RANGE(ptr, value, size, hi, lo) \ 119 pio_clear_##size((ptr), host2xhci(size, BIT_RANGE_INSERT(uint##size##_t, (hi), (lo), (value))), \ 129 pio_clear_##size((ptr), host2xhci(size, BIT_RANGE_INSERT(uint##size##_t, \ 130 (hi), (lo), (value))), \ 120 131 XHCI_PIO_CHANGE_UDELAY); 121 132 … … 409 420 #define XHCI_OP_CA crcr_lo, 32, FLAG, 2 410 421 #define XHCI_OP_CRR crcr_lo, 32, FLAG, 3 411 /* This shall be RANGE, 6, 0, but the value containing CR pointer and RCS flag 412 * must be written at once. */ 422 /* 423 * This shall be RANGE, 6, 0, but the value containing CR pointer and RCS flag 424 * must be written at once. 425 */ 413 426 #define XHCI_OP_CRCR_LO crcr_lo, 32, FIELD 414 427 #define XHCI_OP_CRCR_HI crcr_hi, 32, FIELD … … 466 479 #define XHCI_INTR_ERDP_ESI erdp_lo, 32, RANGE, 2, 0 467 480 #define XHCI_INTR_ERDP_EHB erdp_lo, 32, FLAG, 3 468 // TODO: ERDP_LO is supposed to be RANGE 31, 4 (section 5.5.2.3.3).469 481 #define XHCI_INTR_ERDP_LO erdp_lo, 32, FIELD 470 482 #define XHCI_INTR_ERDP_HI erdp_hi, 32, FIELD … … 532 544 } xhci_extcap_t; 533 545 534 #define XHCI_EC_CAP_ID 535 #define XHCI_EC_SIZE 546 #define XHCI_EC_CAP_ID header, 32, RANGE, 7, 0 547 #define XHCI_EC_SIZE header, 32, RANGE, 15, 8 536 548 537 549 /* Supported protocol */ 538 #define XHCI_EC_SP_MINOR 539 #define XHCI_EC_SP_MAJOR 540 #define XHCI_EC_SP_NAME 541 #define XHCI_EC_SP_CP_OFF 542 #define XHCI_EC_SP_CP_COUNT 543 #define XHCI_EC_SP_PSIC 544 #define XHCI_EC_SP_SLOT_TYPE 550 #define XHCI_EC_SP_MINOR header, 32, RANGE, 23, 16 551 #define XHCI_EC_SP_MAJOR header, 32, RANGE, 31, 24 552 #define XHCI_EC_SP_NAME cap_specific[0], 32, FIELD 553 #define XHCI_EC_SP_CP_OFF cap_specific[1], 32, RANGE, 7, 0 554 #define XHCI_EC_SP_CP_COUNT cap_specific[1], 32, RANGE, 15, 8 555 #define XHCI_EC_SP_PSIC cap_specific[1], 32, RANGE, 31, 28 556 #define XHCI_EC_SP_SLOT_TYPE cap_specific[2], 32, RANGE, 4, 0 545 557 546 558 typedef union { … … 582 594 ioport8_t sem_os; 583 595 584 xhci_dword_t usblegctlsts; /**< USB Legacy Support Control/Status - RW for BIOS, RO for OS */ 596 /** USB Legacy Support Control/Status - RW for BIOS, RO for OS */ 597 xhci_dword_t usblegctlsts; 585 598 } xhci_legsup_t; 586 599 … … 588 601 #define XHCI_LEGSUP_SEM_OS sem_os, 8, FLAG, 0 589 602 590 #define XHCI_LEGSUP_POLLING_DELAY_1MS 1000 591 #define XHCI_LEGSUP_BIOS_TIMEOUT_US 1000000 /* 4.22.1 BIOS may take up to 1 second to release the device */ 603 /* 4.22.1 BIOS may take up to 1 second to release the device */ 604 #define XHCI_LEGSUP_BIOS_TIMEOUT_US 1000000 605 #define XHCI_LEGSUP_POLLING_DELAY_1MS 1000 592 606 593 607 #endif
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