Changeset 7c3fb9b in mainline for uspace/drv/bus/usb/ohci/hw_struct


Ignore:
Timestamp:
2018-05-17T08:29:01Z (8 years ago)
Author:
Jiri Svoboda <jiri@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
6ff23ff
Parents:
fac0ac7
git-author:
Jiri Svoboda <jiri@…> (2018-05-16 17:28:17)
git-committer:
Jiri Svoboda <jiri@…> (2018-05-17 08:29:01)
Message:

Fix block comment formatting (ccheck).

Location:
uspace/drv/bus/usb/ohci/hw_struct
Files:
3 edited

Legend:

Unmodified
Added
Removed
  • uspace/drv/bus/usb/ohci/hw_struct/endpoint_descriptor.c

    rfac0ac7 r7c3fb9b  
    6969
    7070        if (ep == NULL) {
    71                 /* Mark as dead, used for dummy EDs at the beginning of
    72                  * endpoint lists. */
     71                /*
     72                 * Mark as dead, used for dummy EDs at the beginning of
     73                 * endpoint lists.
     74                 */
    7375                OHCI_MEM32_WR(instance->status, ED_STATUS_K_FLAG);
    7476                return;
  • uspace/drv/bus/usb/ohci/hw_struct/endpoint_descriptor.h

    rfac0ac7 r7c3fb9b  
    5151 * OHCI Endpoint Descriptor representation.
    5252 *
    53  * See OHCI spec. Chapter 4.2, page 16 (pdf page 30) for details */
     53 * See OHCI spec. Chapter 4.2, page 16 (pdf page 30) for details
     54 */
    5455typedef struct ed {
    5556        /**
  • uspace/drv/bus/usb/ohci/hw_struct/transfer_descriptor.h

    rfac0ac7 r7c3fb9b  
    4444#include "completion_codes.h"
    4545
    46 /* OHCI TDs can handle up to 8KB buffers, however, it can use max 2 pages.
     46/*
     47 * OHCI TDs can handle up to 8KB buffers, however, it can use max 2 pages.
    4748 * Using 4KB buffers guarantees the page count condition.
    48  * (OHCI assumes 4KB pages) */
     49 * (OHCI assumes 4KB pages)
     50 */
    4951#define OHCI_TD_MAX_TRANSFER (4 * 1024)
    5052
     
    7678        /**
    7779         * Current buffer pointer.
    78          * Phys address of the first byte to be transferred. */
     80         * Phys address of the first byte to be transferred.
     81         */
    7982        volatile uint32_t cbp;
    8083
     
    105108        const int cc = (OHCI_MEM32_RD(instance->status) >> TD_STATUS_CC_SHIFT) &
    106109            TD_STATUS_CC_MASK;
    107         /* This value is changed on transfer completion,
     110        /*
     111         * This value is changed on transfer completion,
    108112         * either to CC_NOERROR or and error code.
    109          * See OHCI spec 4.3.1.3.5 p. 23 (pdf 37) */
     113         * See OHCI spec 4.3.1.3.5 p. 23 (pdf 37)
     114         */
    110115        if (cc != CC_NOACCESS1 && cc != CC_NOACCESS2) {
    111116                return true;
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