Changeset 3bacee1 in mainline for uspace/drv/bus/usb/ohci/hw_struct


Ignore:
Timestamp:
2018-04-12T16:27:17Z (8 years ago)
Author:
Jiri Svoboda <jiri@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
3cf22f9
Parents:
76d0981d
git-author:
Jiri Svoboda <jiri@…> (2018-04-11 19:25:33)
git-committer:
Jiri Svoboda <jiri@…> (2018-04-12 16:27:17)
Message:

Make ccheck-fix again and commit more good files.

Location:
uspace/drv/bus/usb/ohci/hw_struct
Files:
4 edited

Legend:

Unmodified
Added
Removed
  • uspace/drv/bus/usb/ohci/hw_struct/endpoint_descriptor.c

    r76d0981d r3bacee1  
    8181        /* Status: address, endpoint nr, direction mask and max packet size. */
    8282        OHCI_MEM32_WR(instance->status,
    83             ((ep->device->address & ED_STATUS_FA_MASK) << ED_STATUS_FA_SHIFT)
    84             | ((ep->endpoint & ED_STATUS_EN_MASK) << ED_STATUS_EN_SHIFT)
    85             | ((dir[ep->direction] & ED_STATUS_D_MASK) << ED_STATUS_D_SHIFT)
    86             | ((ep->max_packet_size & ED_STATUS_MPS_MASK) << ED_STATUS_MPS_SHIFT));
     83            ((ep->device->address & ED_STATUS_FA_MASK) << ED_STATUS_FA_SHIFT) |
     84            ((ep->endpoint & ED_STATUS_EN_MASK) << ED_STATUS_EN_SHIFT) |
     85            ((dir[ep->direction] & ED_STATUS_D_MASK) << ED_STATUS_D_SHIFT) |
     86            ((ep->max_packet_size & ED_STATUS_MPS_MASK) << ED_STATUS_MPS_SHIFT));
    8787
    8888        /* Low speed flag */
  • uspace/drv/bus/usb/ohci/hw_struct/endpoint_descriptor.h

    r76d0981d r3bacee1  
    119119{
    120120        assert(instance);
    121         return (OHCI_MEM32_RD(instance->td_head) & ED_TDHEAD_HALTED_FLAG)
    122             || (OHCI_MEM32_RD(instance->status) & ED_STATUS_K_FLAG);
     121        return (OHCI_MEM32_RD(instance->td_head) & ED_TDHEAD_HALTED_FLAG) ||
     122            (OHCI_MEM32_RD(instance->status) & ED_STATUS_K_FLAG);
    123123}
    124124
     
    137137{
    138138        assert(instance);
    139         return (OHCI_MEM32_RD(instance->td_head) & ED_TDHEAD_PTR_MASK)
    140             != (OHCI_MEM32_RD(instance->td_tail) & ED_TDTAIL_PTR_MASK);
     139        return (OHCI_MEM32_RD(instance->td_head) & ED_TDHEAD_PTR_MASK) !=
     140            (OHCI_MEM32_RD(instance->td_tail) & ED_TDTAIL_PTR_MASK);
    141141}
    142142
  • uspace/drv/bus/usb/ohci/hw_struct/transfer_descriptor.c

    r76d0981d r3bacee1  
    6868        /* Set PID and Error code */
    6969        OHCI_MEM32_WR(instance->status,
    70             ((dir[direction] & TD_STATUS_DP_MASK) << TD_STATUS_DP_SHIFT)
    71             | ((CC_NOACCESS2 & TD_STATUS_CC_MASK) << TD_STATUS_CC_SHIFT));
     70            ((dir[direction] & TD_STATUS_DP_MASK) << TD_STATUS_DP_SHIFT) |
     71            ((CC_NOACCESS2 & TD_STATUS_CC_MASK) << TD_STATUS_CC_SHIFT));
    7272
    7373        if (toggle == 0 || toggle == 1) {
  • uspace/drv/bus/usb/ohci/hw_struct/transfer_descriptor.h

    r76d0981d r3bacee1  
    103103{
    104104        assert(instance);
    105         const int cc = (OHCI_MEM32_RD(instance->status) >> TD_STATUS_CC_SHIFT)
    106                 & TD_STATUS_CC_MASK;
     105        const int cc = (OHCI_MEM32_RD(instance->status) >> TD_STATUS_CC_SHIFT) &
     106            TD_STATUS_CC_MASK;
    107107        /* This value is changed on transfer completion,
    108108         * either to CC_NOERROR or and error code.
     
    122122{
    123123        assert(instance);
    124         const int cc = (OHCI_MEM32_RD(instance->status)
    125             >> TD_STATUS_CC_SHIFT) & TD_STATUS_CC_MASK;
     124        const int cc = (OHCI_MEM32_RD(instance->status) >>
     125            TD_STATUS_CC_SHIFT) & TD_STATUS_CC_MASK;
    126126        return cc_to_rc(cc);
    127127}
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