Changeset 7688b5d in mainline for kernel/arch/mips32/src/interrupt.c
- Timestamp:
- 2006-10-18T09:54:13Z (19 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 6fb30a1
- Parents:
- 19de05f
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/mips32/src/interrupt.c
r19de05f r7688b5d 40 40 #include <time/clock.h> 41 41 #include <arch/drivers/arc.h> 42 #include <ipc/sysipc.h> 43 #include <ddi/device.h> 44 #include <ddi/irq.h> 42 45 43 #include <ipc/sysipc.h> 46 #define IRQ_COUNT 8 47 #define TIMER_IRQ 7 48 49 function timer_fnc = NULL; 50 static irq_t timer_irq; 44 51 45 52 /** Disable interrupts. … … 92 99 } 93 100 94 static void timer_exception(int n, istate_t *istate) 101 static irq_ownership_t timer_claim(void) 102 { 103 return IRQ_ACCEPT; 104 } 105 106 static void timer_irq_handler(irq_t *irq, void *arg, ...) 95 107 { 96 108 unsigned long drift; … … 104 116 cp0_compare_write(nextcount); 105 117 clock(); 106 } 107 108 static void swint0(int n, istate_t *istate) 109 { 110 cp0_cause_write(cp0_cause_read() & ~(1 << 8)); /* clear SW0 interrupt */ 111 ipc_irq_send_notif(0); 112 } 113 114 static void swint1(int n, istate_t *istate) 115 { 116 cp0_cause_write(cp0_cause_read() & ~(1 << 9)); /* clear SW1 interrupt */ 117 ipc_irq_send_notif(1); 118 119 if (timer_fnc != NULL) 120 timer_fnc(); 118 121 } 119 122 … … 121 124 void interrupt_init(void) 122 125 { 123 int_register(TIMER_IRQ, "timer", timer_exception); 124 int_register(0, "swint0", swint0); 125 int_register(1, "swint1", swint1); 126 irq_init(IRQ_COUNT, IRQ_COUNT); 127 128 irq_initialize(&timer_irq); 129 timer_irq.devno = device_assign_devno(); 130 timer_irq.inr = TIMER_IRQ; 131 timer_irq.claim = timer_claim; 132 timer_irq.handler = timer_irq_handler; 133 irq_register(&timer_irq); 134 126 135 timer_start(); 127 } 128 129 static void ipc_int(int n, istate_t *istate) 130 { 131 ipc_irq_send_notif(n-INT_OFFSET); 132 } 133 134 /* Reregister irq to be IPC-ready */ 135 void irq_ipc_bind_arch(unative_t irq) 136 { 137 /* Do not allow to redefine timer */ 138 /* Swint0, Swint1 are already handled */ 139 if (irq == TIMER_IRQ || irq < 2) 140 return; 141 int_register(irq, "ipc_int", ipc_int); 136 cp0_unmask_int(TIMER_IRQ); 142 137 } 143 138
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