Changeset 6f878b7 in mainline for arch/amd64/src/boot/boot.S
- Timestamp:
- 2005-08-30T15:06:03Z (20 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- a9387ea
- Parents:
- 1e9a463
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
arch/amd64/src/boot/boot.S
r1e9a463 r6f878b7 27 27 # 28 28 29 .section K_TEXT_START 30 .global kernel_image_start 29 #include <arch/mm/ptl.h> 31 30 32 .code16 31 #define START_STACK 0x7c00 32 #define START_STACK_64 $0xffffffff80007c00 33 33 34 # 34 35 # This is where we require any SPARTAN-kernel-compatible boot loader … … 39 40 # switch to protected mode. 40 41 # 42 .section K_TEXT_START 43 .code16 44 .global kernel_image_start 41 45 kernel_image_start: 42 46 cli … … 44 48 movw %ax,%ds 45 49 movw %ax,%ss # initialize stack segment register 46 movl $0x7c00,%esp # initialize stack pointer50 movl START_STACK,%esp # initialize stack pointer 47 51 48 call memmap_arch_init52 # call memmap_arch_init 49 53 50 54 mov $0x80000000, %eax … … 57 61 jnc no_long_mode 58 62 59 # Fill out GDTR.base, IDTR.base 60 leal gdtr, %eax 61 movl gdt_addr, %ebx 62 movl %ebx, 2(%eax) 63 # Load gdtr, idtr 64 lgdt gdtr_inst 65 lidt idtr_inst 66 67 movl %cr0,%eax 68 orl $0x1,%eax 69 movl %eax,%cr0 # switch to protected mode 63 70 64 movl idt_addr, %ebx 65 leal idtr, %eax 66 movl %ebx, 2(%eax) 67 68 # Load gdtr, idtr 69 lgdt gdtr 70 lidt idtr 71 72 mov $1, %eax # Enable protected mode (CR0.PE = 1) 73 mov %eax, %cr0 74 75 jmpl $8, $now_in_prot 76 77 now_in_prot: 78 71 jmpl $40, $now_in_prot 79 72 80 73 no_long_mode: 81 74 1: 82 75 jmp 1b 76 77 # Protected 16-bit. We want to reuse the code-seg descriptor, 78 # the Default operand size must not be 1 when entering long mode 79 now_in_prot: 80 # Set up stack & data descriptors 81 movw $16, %ax 82 movw %ax, %ds 83 movw %ax, %fs 84 movw %ax, %gs 85 movw %ax, %ss 86 87 # Enable 64-bit page transaltion entries - CR4.PAE = 1. 88 # Paging is not enabled until after long mode is enabled 89 movl %cr4, %eax 90 btsl $5, %eax 91 movl %eax, %cr4 92 93 # Set up paging tables 94 leal ptl_0, %eax 95 movl %eax, %cr3 96 97 # Enable long mode 98 movl $0xc0000080, %ecx # EFER MSR number 99 rdmsr # Read EFER 100 btsl $8, %eax # Set LME=1 101 wrmsr # Write EFER 102 103 # Enable paging to activate long mode (set CR0.PG=1) 104 movl %cr0, %eax 105 btsl $31, %eax 106 movl %eax, %cr0 107 108 # At this point we are in compatibility mode 109 jmpl $8, $start64 110 111 .code64 112 start64: 113 movq START_STACK_64, %rsp 114 115 lidt idtr_inst 116 117 call main_bsp # never returns 118 1: 119 jmp 1b 83 120 84 121 85 .section K_DATA_START 122 .section K_DATA_START 86 123 .align 4096 87 page_directory: 88 .space 4096, 0 124 .global ptl_2 125 ptl_2: 126 .quad 0x0 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE) 127 .quad 0x200000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE) 128 .quad 0x400000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE) 129 .quad 0x600000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE) 130 .quad 0x800000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE) 131 .quad 0xa00000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE) 132 .quad 0xc00000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE) 133 .quad 0xe00000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE) 134 135 .align 4096 136 .global ptl_1 137 ptl_1: 138 .quad ptl_2 + (PTL_WRITABLE | PTL_PRESENT) 139 .fill 509,8,0 140 .quad ptl_2 + (PTL_WRITABLE | PTL_PRESENT) 141 .fill 2,8,0 142 143 .align 4096 144 .global ptl_0 145 ptl_0: 146 .quad ptl_1 + (PTL_WRITABLE | PTL_PRESENT) 147 .fill 510,8,0 148 .quad ptl_1 + (PTL_WRITABLE | PTL_PRESENT) 89 149 90 gdt_addr: 91 .quad gdt + 0x80000000 92 idt_addr: 93 .quad idt + 0x80000000 150 .global gdtr_inst 151 gdtr_inst: 152 .word 7*8 # GDT_ITEMS * 8 153 .long gdt + 0x80000000 154 155 .global idtr_inst 156 idtr_inst: 157 .word 0 158 .long idt + 0x80000000
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