Changeset 64f6ef04 in mainline for kernel/arch/amd64/src/boot/boot.S

Timestamp:

2010-06-27T23:54:45Z (15 years ago)

Author:

Martin Decky <martin@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

05e3cb8

Parents:

a1f60f3

Message:

amd64: create identity mapping of the first 8 GB of physical memory (instead of just 4 GB) during the bootstrap process
remove the crude on-demand identity mapping creation which could lead to livelocks (unmapping the page pointing to 0 MB physical while trying to map the page pointing to 4096 MB physical)

(currently the implementation is in no way closer to the ideal solution of ticket #3, but at least it allows to debug non-trivial cases of physical memory sizes > 4 GB during the approach to solving #3)

File:

• kernel/arch/amd64/src/boot/boot.S (modified) (1 diff)

kernel/arch/amd64/src/boot/boot.S

@@ -263 +263 @@
 #
 .macro ptl2gen cnt g
-.if \cnt
-        ptl2gen "\cnt - 8" \g
-        .quad ((\cnt - 8) * 0x200000) + (\g * 1024 * 1024 * 1024) | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
-        .quad ((\cnt - 7) * 0x200000) + (\g * 1024 * 1024 * 1024) | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
-        .quad ((\cnt - 6) * 0x200000) + (\g * 1024 * 1024 * 1024) | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
-        .quad ((\cnt - 5) * 0x200000) + (\g * 1024 * 1024 * 1024) | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
-        .quad ((\cnt - 4) * 0x200000) + (\g * 1024 * 1024 * 1024) | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
-        .quad ((\cnt - 3) * 0x200000) + (\g * 1024 * 1024 * 1024) | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
-        .quad ((\cnt - 2) * 0x200000) + (\g * 1024 * 1024 * 1024) | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
-        .quad ((\cnt - 1) * 0x200000) + (\g * 1024 * 1024 * 1024) | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
-.endif
+        .if \cnt
+                ptl2gen "\cnt - 8" \g
+                .quad ((\cnt - 8) * 0x200000) + (\g * 1024 * 1024 * 1024) | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
+                .quad ((\cnt - 7) * 0x200000) + (\g * 1024 * 1024 * 1024) | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
+                .quad ((\cnt - 6) * 0x200000) + (\g * 1024 * 1024 * 1024) | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
+                .quad ((\cnt - 5) * 0x200000) + (\g * 1024 * 1024 * 1024) | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
+                .quad ((\cnt - 4) * 0x200000) + (\g * 1024 * 1024 * 1024) | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
+                .quad ((\cnt - 3) * 0x200000) + (\g * 1024 * 1024 * 1024) | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
+                .quad ((\cnt - 2) * 0x200000) + (\g * 1024 * 1024 * 1024) | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
+                .quad ((\cnt - 1) * 0x200000) + (\g * 1024 * 1024 * 1024) | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
+        .endif
 .endm
 
-# Page table for pages in the first gigabyte.
-.align 4096
-.global ptl_2_0g
+# Page table for pages in the 1st gigabyte.
+.align 4096
 ptl_2_0g:
         ptl2gen 512 0
 
-# Page table for pages in the second gigabyte.
-.align 4096
-.global ptl_2_1g
+# Page table for pages in the 2nd gigabyte.
+.align 4096
 ptl_2_1g:
         ptl2gen 512 1
 
-# Page table for pages in the third gigabyte.
-.align 4096
-.global ptl_2_2g
+# Page table for pages in the 3rd gigabyte.
+.align 4096
 ptl_2_2g:
         ptl2gen 512 2
 
-# Page table for pages in the fourth gigabyte.
-.align 4096
-.global ptl_2_3g
+# Page table for pages in the 4th gigabyte.
+.align 4096
 ptl_2_3g:
         ptl2gen 512 3
 
-.align 4096
-.global ptl_1
+# Page table for pages in the 5th gigabyte.
+.align 4096
+ptl_2_4g:
+        ptl2gen 512 3
+
+# Page table for pages in the 6th gigabyte.
+.align 4096
+ptl_2_5g:
+        ptl2gen 512 3
+
+# Page table for pages in the 7th gigabyte.
+.align 4096
+ptl_2_6g:
+        ptl2gen 512 3
+
+# Page table for pages in the 8th gigabyte.
+.align 4096
+ptl_2_7g:
+        ptl2gen 512 3
+
+.align 4096
 ptl_1:
-        # Identity mapping for [0; 4G)
+        # Identity mapping for [0; 8G)
         .quad ptl_2_0g + (PTL_WRITABLE | PTL_PRESENT)
         .quad ptl_2_1g + (PTL_WRITABLE | PTL_PRESENT)
         .quad ptl_2_2g + (PTL_WRITABLE | PTL_PRESENT)
         .quad ptl_2_3g + (PTL_WRITABLE | PTL_PRESENT)
-        .fill 508, 8, 0
+        .quad ptl_2_4g + (PTL_WRITABLE | PTL_PRESENT)
+        .quad ptl_2_5g + (PTL_WRITABLE | PTL_PRESENT)
+        .quad ptl_2_6g + (PTL_WRITABLE | PTL_PRESENT)
+        .quad ptl_2_7g + (PTL_WRITABLE | PTL_PRESENT)
+        .fill 504, 8, 0
 
 .align 4096