Changeset 52fc805 in mainline for uspace/drv/infrastructure/rootamdm37x/usbtll.h

Timestamp:

2012-10-15T19:27:58Z (13 years ago)

Author:

Jan Vesely <jano.vesely@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

a5a73c0

Parents:

f4c9e42

Message:

rootamdm37x: Use new pio functions to access UHH and TLL

File:

• uspace/drv/infrastructure/rootamdm37x/usbtll.h (modified) (4 diffs)

uspace/drv/infrastructure/rootamdm37x/usbtll.h

@@ -42 +42 @@
 typedef struct {
         const ioport32_t revision;
-#define TLL_REVISION_MASK  0xf
-#define TLL_REVISION_MINOR_SHIFT  0
-#define TLL_REVISION_MAJOR_SHIFT  4
+#define TLL_REVISION_MINOR_MASK  0x0f
+#define TLL_REVISION_MAJOR_MASK  0xf0
 
         uint32_t padd0_[3];
@@ -51 +50 @@
 #define TLL_SYSCONFIG_SOFTRESET_FLAG  (1 << 1)
 #define TLL_SYSCONFIG_ENWAKEUP_FLAG  (1 << 2)
+#define TLL_SYSCONFIG_SIDLE_MODE_MASK  (0x3 << 3)
+#define TLL_SYSCONFIG_SIDLE_MODE_FORCE  (0x0 << 3)
+#define TLL_SYSCONFIG_SIDLE_MODE_NO  (0x1 << 3)
+#define TLL_SYSCONFIG_SIDLE_MODE_SMART  (0x2 << 3)
 #define TLL_SYSCONFIG_CLOCKACTIVITY_FLAG  (1 << 8)
-#define TLL_SYSCONFIG_SIDLE_MODE_MASK  0x3
-#define TLL_SYSCONFIG_SIDLE_MODE_SHIFT  3
 
         ioport32_t sysstatus;
@@ -72 +73 @@
 #define TLL_SHARED_CONF_FCLK_IS_ON_FLAG  (1 << 0)
 #define TLL_SHARED_CONF_FCLK_REQ_FLAG  (1 << 1)
+#define TLL_SHARED_CONF_USB_DIVRATIO_MASK  (0x7 << 2)
+#define TLL_SHARED_CONF_USB_DIVRATIO(x)  (((x) & 0x7) << 2)
 #define TLL_SHARED_CONF_USB_180D_SDR_EN_FLAG  (1 << 5)
 #define TLL_SHARED_CONF_USB_90D_DDR_EN_FLAG  (1 << 6)
-#define TLL_SHARED_CONF_USB_DIVRATIO_MASK  0x7
-#define TLL_SHARED_CONF_USB_DIVRATIO_SHIFT 2
 
         uint32_t padd2_[3];
         ioport32_t channel_conf[3];
 #define TLL_CHANNEL_CONF_CHANEN_FLAG  (1 << 0)
-#define TLL_CHANNEL_CONF_CHANMODE_MASK  0x3
-#define TLL_CHANNEL_CONF_CHANMODE_SHIFT  1
-#define TLL_CHANNEL_CONF_CHANMODE_UTMI_ULPI_MODE 0
-#define TLL_CHANNEL_CONF_CHANMODE_UTMI_SERIAL_MODE 1
-#define TLL_CHANNEL_CONF_CHANMODE_UTMI_TRANS_MODE 2
-#define TLL_CHANNEL_CONF_CHANMODE_NO_MODE 3
+#define TLL_CHANNEL_CONF_CHANMODE_MASK  (0x3 << 1)
+#define TLL_CHANNEL_CONF_CHANMODE_UTMI_ULPI_MODE (0x0 << 1)
+#define TLL_CHANNEL_CONF_CHANMODE_UTMI_SERIAL_MODE (0x1 << 1)
+#define TLL_CHANNEL_CONF_CHANMODE_UTMI_TRANS_MODE (0x2 << 1)
+#define TLL_CHANNEL_CONF_CHANMODE_NO_MODE (0x3 << 1)
 #define TLL_CHANNEL_CONF_UTMIISADEV_FLAG  (1 << 3)
 #define TLL_CHANNEL_CONF_TLLATTACH_FLAG  (1 << 4)
@@ -101 +101 @@
 #define TLL_CHANNEL_CONF_TESTTXDAT_FLAG  (1 << 19)
 #define TLL_CHANNEL_CONF_TESTTXSE0_FLAG  (1 << 20)
-#define TLL_CHANNEL_CONF_FSLSMODE_MASK  0xf
-#define TLL_CHANNEL_CONF_FSLSMODE_SHIFT  24
-#define TLL_CHANNEL_CONF_FSLSLINESTATE_MASK  0x3
-#define TLL_CHANNEL_CONF_FSLSLINESTATE_SHIFT  28
+#define TLL_CHANNEL_CONF_FSLSMODE_MASK   (0xf << 24)
+#define TLL_CHANNEL_CONF_FSLSMODE_6PIN_UNI_PHY_TX_DATSE0   (0x0 << 24)
+#define TLL_CHANNEL_CONF_FSLSMODE_6PIN_UNI_PHY_TX_DPDM   (0x1 << 24)
+#define TLL_CHANNEL_CONF_FSLSMODE_3PIN_BIDI_PHY   (0x2 << 24)
+#define TLL_CHANNEL_CONF_FSLSMODE_4PIN_BIDI_PHY   (0x3 << 24)
+#define TLL_CHANNEL_CONF_FSLSMODE_6PIN_UNI_TLL_TX_DATSE0  (0x4 << 24)
+#define TLL_CHANNEL_CONF_FSLSMODE_6PIN_UNI_TLL_TX_DPDM  (0x5 << 24)
+#define TLL_CHANNEL_CONF_FSLSMODE_3PIN_BIDI_TLL  (0x6 << 24)
+#define TLL_CHANNEL_CONF_FSLSMODE_4PIN_BIDI_TLL  (0x7 << 24)
+#define TLL_CHANNEL_CONF_FSLSMODE_2PIN_BIDI_TLL_DATSE0  (0xa << 24)
+#define TLL_CHANNEL_CONF_FSLSMODE_2PIN_BIDI_TLL_DPDM  (0xb << 24)
+
+#define TLL_CHANNEL_CONF_FSLSLINESTATE_MASK  (0x3 << 28)
+#define TLL_CHANNEL_CONF_FSLSLINESTATE_SE0  (0x0 << 28)
+#define TLL_CHANNEL_CONF_FSLSLINESTATE_FS_J  (0x1 << 28)
+#define TLL_CHANNEL_CONF_FSLSLINESTATE_FS_K  (0x2 << 28)
+#define TLL_CHANNEL_CONF_FSLSLINESTATE_SE1  (0x3 << 28)
 
         /* The rest are 8bit ULPI registers */