Changeset 51c1d500 in mainline for uspace/drv/bus/usb/xhci/hc.c

Timestamp:

2018-01-20T17:16:33Z (7 years ago)

Author:

Ondřej Hlavatý <aearsis@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

6271a34

Parents:

abb5d08

Message:

xhci: move HC semantics from endpoint/device to hc module

File:

• uspace/drv/bus/usb/xhci/hc.c (modified) (13 diffs)

uspace/drv/bus/usb/xhci/hc.c

@@ -703 +703 @@
 }
 
+unsigned hc_speed_to_psiv(usb_speed_t speed)
+{
+        assert(speed < ARRAY_SIZE(usb_speed_to_psiv));
+        return usb_speed_to_psiv[speed];
+}
+
 /**
  * Ring a xHC Doorbell. Implements section 4.7.
@@ -715 +721 @@
 
 /**
+ * Return an index to device context.
+ */
+static uint8_t endpoint_dci(xhci_endpoint_t *ep)
+{
+        return (2 * ep->base.endpoint) +
+                (ep->base.transfer_type == USB_TRANSFER_CONTROL
+                 || ep->base.direction == USB_DIRECTION_IN);
+}
+
+void hc_ring_ep_doorbell(xhci_endpoint_t *ep, uint32_t stream_id)
+{
+        xhci_device_t * const dev = xhci_ep_to_dev(ep);
+        xhci_hc_t * const hc = bus_to_hc(dev->base.bus);
+        const uint8_t dci = endpoint_dci(ep);
+        const uint32_t target = (stream_id << 16) | (dci & 0x1ff);
+        hc_ring_doorbell(hc, dev->slot_id, target);
+}
+
+/**
  * Issue an Enable Slot command. Allocate memory for the slot and fill the
  * DCBAA with the newly created slot.
@@ -772 +797 @@
 
 /**
- * Fill a slot context that is part of an Input Context with appropriate
- * values.
- *
- * @param ctx Slot context, zeroed out.
- */
-static void xhci_setup_slot_context(xhci_device_t *dev, xhci_slot_ctx_t *ctx)
-{
-        /* Initialize slot_ctx according to section 4.3.3 point 3. */
-        XHCI_SLOT_ROOT_HUB_PORT_SET(*ctx, dev->rh_port);
-        XHCI_SLOT_ROUTE_STRING_SET(*ctx, dev->route_str);
-        XHCI_SLOT_SPEED_SET(*ctx, usb_speed_to_psiv[dev->base.speed]);
-
-        /*
-         * Note: This function is used even before this flag can be set, to
-         *       issue the address device command. It is OK, because these
-         *       flags are not required to be valid for that command.
-         */
-        if (dev->is_hub) {
-                XHCI_SLOT_HUB_SET(*ctx, 1);
-                XHCI_SLOT_NUM_PORTS_SET(*ctx, dev->num_ports);
-                XHCI_SLOT_TT_THINK_TIME_SET(*ctx, dev->tt_think_time);
-                XHCI_SLOT_MTT_SET(*ctx, 0); // MTT not supported yet
-        }
-
-        /* Setup Transaction Translation. TODO: Test this with HS hub. */
-        if (dev->base.tt.dev != NULL) {
-                xhci_device_t *hub = xhci_device_get(dev->base.tt.dev);
-                XHCI_SLOT_TT_HUB_SLOT_ID_SET(*ctx, hub->slot_id);
-                XHCI_SLOT_TT_HUB_PORT_SET(*ctx, dev->base.tt.port);
-        }
-
-        // As we always allocate space for whole input context, we can set this to maximum
-        XHCI_SLOT_CTX_ENTRIES_SET(*ctx, 31);
-}
-
-/**
  * Prepare an empty Endpoint Input Context inside a dma buffer.
  */
@@ -832 +821 @@
  *
  * @param dev Device to assing an address (unconfigured yet)
- * @param ep0 EP0 of device TODO remove, can be fetched from dev
- */
-int hc_address_device(xhci_device_t *dev, xhci_endpoint_t *ep0)
+ */
+int hc_address_device(xhci_device_t *dev)
 {
         int err = ENOMEM;
         xhci_hc_t * const hc = bus_to_hc(dev->base.bus);
+        xhci_endpoint_t *ep0 = xhci_endpoint_get(dev->base.endpoints[0]);
 
         /* Although we have the precise PSIV value on devices of tier 1,
@@ -854 +843 @@
         /* Copy endpoint 0 context and set A1 flag. */
         XHCI_INPUT_CTRL_CTX_ADD_SET(*XHCI_GET_CTRL_CTX(ictx, hc), 1);
-        xhci_ep_ctx_t *ep_ctx = XHCI_GET_EP_CTX(XHCI_GET_DEVICE_CTX(ictx, hc), hc, 0);
+        xhci_ep_ctx_t *ep_ctx = XHCI_GET_EP_CTX(XHCI_GET_DEVICE_CTX(ictx, hc), hc, 1);
         xhci_setup_endpoint_context(ep0, ep_ctx);
+
         /* Address device needs Ctx entries set to 1 only */
         xhci_slot_ctx_t *slot_ctx = XHCI_GET_SLOT_CTX(XHCI_GET_DEVICE_CTX(ictx, hc), hc);
@@ -909 +899 @@
  * @param ep_ctx Endpoint context of the endpoint
  */
-int hc_add_endpoint(xhci_device_t *dev, uint8_t ep_idx, xhci_ep_ctx_t *ep_ctx)
-{
+int hc_add_endpoint(xhci_endpoint_t *ep)
+{
+        xhci_device_t * const dev = xhci_ep_to_dev(ep);
+        const unsigned dci = endpoint_dci(ep);
+
         /* Issue configure endpoint command (sec 4.3.5). */
         dma_buffer_t ictx_dma_buf;
@@ -920 +913 @@
 
         xhci_hc_t * const hc = bus_to_hc(dev->base.bus);
-        XHCI_INPUT_CTRL_CTX_ADD_SET(*XHCI_GET_CTRL_CTX(ictx, hc), ep_idx + 1); /* Preceded by slot ctx */
-
-        xhci_ep_ctx_t *_ep_ctx = XHCI_GET_EP_CTX(XHCI_GET_DEVICE_CTX(ictx, hc), hc, ep_idx);
-        memcpy(_ep_ctx, ep_ctx, XHCI_ONE_CTX_SIZE(hc));
+        XHCI_INPUT_CTRL_CTX_ADD_SET(*XHCI_GET_CTRL_CTX(ictx, hc), dci);
+
+        xhci_ep_ctx_t *ep_ctx = XHCI_GET_EP_CTX(XHCI_GET_DEVICE_CTX(ictx, hc), hc, dci);
+        xhci_setup_endpoint_context(ep, ep_ctx);
 
         return xhci_cmd_sync_inline(hc, CONFIGURE_ENDPOINT, .slot_id = dev->slot_id, .input_ctx = ictx_dma_buf);
@@ -934 +927 @@
  * @param ep_idx Endpoint DCI in question
  */
-int hc_drop_endpoint(xhci_device_t *dev, uint8_t ep_idx)
-{
+int hc_drop_endpoint(xhci_endpoint_t *ep)
+{
+        xhci_device_t * const dev = xhci_ep_to_dev(ep);
+        const unsigned dci = endpoint_dci(ep);
+
         /* Issue configure endpoint command (sec 4.3.5). */
         dma_buffer_t ictx_dma_buf;
@@ -944 +940 @@
         xhci_hc_t * const hc = bus_to_hc(dev->base.bus);
         xhci_input_ctx_t *ictx = ictx_dma_buf.virt;
-        XHCI_INPUT_CTRL_CTX_DROP_SET(*XHCI_GET_CTRL_CTX(ictx, hc), ep_idx + 1); /* Preceded by slot ctx */
+        XHCI_INPUT_CTRL_CTX_DROP_SET(*XHCI_GET_CTRL_CTX(ictx, hc), dci);
 
         return xhci_cmd_sync_inline(hc, CONFIGURE_ENDPOINT, .slot_id = dev->slot_id, .input_ctx = ictx_dma_buf);
@@ -957 +953 @@
  * @param ep_ctx Endpoint context of the endpoint
  */
-int hc_update_endpoint(xhci_device_t *dev, uint8_t ep_idx, xhci_ep_ctx_t *ep_ctx)
-{
+int hc_update_endpoint(xhci_endpoint_t *ep)
+{
+        xhci_device_t * const dev = xhci_ep_to_dev(ep);
+        const unsigned dci = endpoint_dci(ep);
+
         dma_buffer_t ictx_dma_buf;
         xhci_hc_t * const hc = bus_to_hc(dev->base.bus);
@@ -969 +968 @@
         memset(ictx, 0, XHCI_INPUT_CTX_SIZE(hc));
 
-        XHCI_INPUT_CTRL_CTX_ADD_SET(*XHCI_GET_CTRL_CTX(ictx, hc), ep_idx + 1);
-        xhci_ep_ctx_t *_ep_ctx = XHCI_GET_EP_CTX(XHCI_GET_DEVICE_CTX(ictx, hc), hc, 0);
-        memcpy(_ep_ctx, ep_ctx, sizeof(xhci_ep_ctx_t));
+        XHCI_INPUT_CTRL_CTX_ADD_SET(*XHCI_GET_CTRL_CTX(ictx, hc), dci);
+        xhci_ep_ctx_t *ep_ctx = XHCI_GET_EP_CTX(XHCI_GET_DEVICE_CTX(ictx, hc), hc, dci);
+        xhci_setup_endpoint_context(ep, ep_ctx);
 
         return xhci_cmd_sync_inline(hc, EVALUATE_CONTEXT, .slot_id = dev->slot_id, .input_ctx = ictx_dma_buf);
@@ -982 +981 @@
  * @param ep_idx Endpoint DCI in question
  */
-int hc_stop_endpoint(xhci_device_t *dev, uint8_t ep_idx)
-{
+int hc_stop_endpoint(xhci_endpoint_t *ep)
+{
+        xhci_device_t * const dev = xhci_ep_to_dev(ep);
+        const unsigned dci = endpoint_dci(ep);
         xhci_hc_t * const hc = bus_to_hc(dev->base.bus);
-        return xhci_cmd_sync_inline(hc, STOP_ENDPOINT, .slot_id = dev->slot_id, .endpoint_id = ep_idx);
+        return xhci_cmd_sync_inline(hc, STOP_ENDPOINT, .slot_id = dev->slot_id, .endpoint_id = dci);
 }
 
@@ -994 +995 @@
  * @param ep_idx Endpoint DCI in question
  */
-int hc_reset_endpoint(xhci_device_t *dev, uint8_t ep_idx)
-{
+int hc_reset_endpoint(xhci_endpoint_t *ep)
+{
+        xhci_device_t * const dev = xhci_ep_to_dev(ep);
+        const unsigned dci = endpoint_dci(ep);
         xhci_hc_t * const hc = bus_to_hc(dev->base.bus);
-        return xhci_cmd_sync_inline(hc, RESET_ENDPOINT, .slot_id = dev->slot_id, .endpoint_id = ep_idx);
+        return xhci_cmd_sync_inline(hc, RESET_ENDPOINT, .slot_id = dev->slot_id, .endpoint_id = dci);
+}
+
+/**
+ * Reset a ring position in both software and hardware.
+ *
+ * @param dev The owner of the endpoint
+ */
+int hc_reset_ring(xhci_endpoint_t *ep, uint32_t stream_id)
+{
+        xhci_device_t * const dev = xhci_ep_to_dev(ep);
+        const unsigned dci = endpoint_dci(ep);
+        uintptr_t addr;
+
+        xhci_trb_ring_t *ring = xhci_endpoint_get_ring(ep, stream_id);
+        xhci_trb_ring_reset_dequeue_state(ring, &addr);
+
+        xhci_hc_t * const hc = bus_to_hc(endpoint_get_bus(&ep->base));
+        return xhci_cmd_sync_inline(hc, SET_TR_DEQUEUE_POINTER,
+                            .slot_id = dev->slot_id,
+                            .endpoint_id = dci,
+                            .stream_id = stream_id,
+                            .dequeue_ptr = addr,
+                        );
 }