Changeset 4b1c7c6f in mainline
- Timestamp:
- 2018-03-16T20:57:16Z (7 years ago)
- Children:
- 6be2c13
- Parents:
- 973be387
- git-author:
- Jiří Zárevúcky <zarevucky.jiri@…> (2018-03-16 20:51:59)
- git-committer:
- Jiří Zárevúcky <zarevucky.jiri@…> (2018-03-16 20:57:16)
- Location:
- kernel
- Files:
-
- 45 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/abs32le/include/arch/mm/page.h
r973be387 r4b1c7c6f 92 92 get_pt_flags((pte_t *) (ptl0), (size_t) (i)) 93 93 #define GET_PTL2_FLAGS_ARCH(ptl1, i) \ 94 PAGE_PRESENT94 0 95 95 #define GET_PTL3_FLAGS_ARCH(ptl2, i) \ 96 PAGE_PRESENT96 0 97 97 #define GET_FRAME_FLAGS_ARCH(ptl3, i) \ 98 98 get_pt_flags((pte_t *) (ptl3), (size_t) (i)) … … 154 154 return ( 155 155 ((unsigned int) (!p->page_cache_disable) << PAGE_CACHEABLE_SHIFT) | 156 ((unsigned int) (!p->present) << PAGE_ PRESENT_SHIFT) |156 ((unsigned int) (!p->present) << PAGE_NOT_PRESENT_SHIFT) | 157 157 ((unsigned int) p->uaccessible << PAGE_USER_SHIFT) | 158 (1 << PAGE_READ_SHIFT) |159 158 ((unsigned int) p->writeable << PAGE_WRITE_SHIFT) | 160 159 (1 << PAGE_EXEC_SHIFT) | -
kernel/arch/amd64/include/arch/mm/page.h
r973be387 r4b1c7c6f 212 212 213 213 return ((!p->page_cache_disable) << PAGE_CACHEABLE_SHIFT | 214 (!p->present) << PAGE_ PRESENT_SHIFT |214 (!p->present) << PAGE_NOT_PRESENT_SHIFT | 215 215 p->uaccessible << PAGE_USER_SHIFT | 216 1 << PAGE_READ_SHIFT |217 216 p->writeable << PAGE_WRITE_SHIFT | 218 217 (!p->no_execute) << PAGE_EXEC_SHIFT | -
kernel/arch/amd64/src/mm/page.c
r973be387 r4b1c7c6f 56 56 uintptr_t cur; 57 57 unsigned int identity_flags = 58 PAGE_GLOBAL | PAGE_CACHEABLE | PAGE_EXEC | PAGE_WRITE | PAGE_READ;58 PAGE_GLOBAL | PAGE_CACHEABLE | PAGE_EXEC | PAGE_WRITE; 59 59 60 60 page_mapping_operations = &pt_mapping_operations; -
kernel/arch/amd64/src/vreg.c
r973be387 r4b1c7c6f 67 67 68 68 page = (uint64_t *) km_map(frame, PAGE_SIZE, 69 PAGE_ READ | PAGE_WRITE | PAGE_USER | PAGE_CACHEABLE);69 PAGE_WRITE | PAGE_USER | PAGE_CACHEABLE); 70 70 71 71 write_msr(AMD_MSR_FS, (uintptr_t) page); -
kernel/arch/arm32/include/arch/mm/page.h
r973be387 r4b1c7c6f 108 108 get_pt_level0_flags((pte_t *) (ptl0), (size_t) (i)) 109 109 #define GET_PTL2_FLAGS_ARCH(ptl1, i) \ 110 PAGE_PRESENT110 0 111 111 #define GET_PTL3_FLAGS_ARCH(ptl2, i) \ 112 PAGE_PRESENT112 0 113 113 #define GET_FRAME_FLAGS_ARCH(ptl3, i) \ 114 114 get_pt_level1_flags((pte_t *) (ptl3), (size_t) (i)) -
kernel/arch/arm32/include/arch/mm/page_armv4.h
r973be387 r4b1c7c6f 138 138 int np = (p->descriptor_type == PTE_DESCRIPTOR_NOT_PRESENT); 139 139 140 return (np << PAGE_ PRESENT_SHIFT) | (1 << PAGE_USER_SHIFT) |141 (1 << PAGE_ READ_SHIFT) | (1 << PAGE_WRITE_SHIFT) |140 return (np << PAGE_NOT_PRESENT_SHIFT) | (1 << PAGE_USER_SHIFT) | 141 (1 << PAGE_WRITE_SHIFT) | 142 142 (1 << PAGE_EXEC_SHIFT) | (1 << PAGE_CACHEABLE_SHIFT); 143 143 } … … 156 156 int ap = p->access_permission_0; 157 157 158 return ((dt == PTE_DESCRIPTOR_NOT_PRESENT) << PAGE_PRESENT_SHIFT) | 159 ((ap == PTE_AP_USER_RO_KERNEL_RW) << PAGE_READ_SHIFT) | 160 ((ap == PTE_AP_USER_RW_KERNEL_RW) << PAGE_READ_SHIFT) | 158 return ((dt == PTE_DESCRIPTOR_NOT_PRESENT) << PAGE_NOT_PRESENT_SHIFT) | 161 159 ((ap == PTE_AP_USER_RW_KERNEL_RW) << PAGE_WRITE_SHIFT) | 162 160 ((ap != PTE_AP_USER_NO_KERNEL_RW) << PAGE_USER_SHIFT) | 163 ((ap == PTE_AP_USER_NO_KERNEL_RW) << PAGE_READ_SHIFT) |164 161 ((ap == PTE_AP_USER_NO_KERNEL_RW) << PAGE_WRITE_SHIFT) | 165 162 (1 << PAGE_EXEC_SHIFT) | … … 220 217 221 218 if (flags & PAGE_USER) { 222 if (flags & PAGE_READ) { 219 if (flags & PAGE_WRITE) { 220 p->access_permission_0 = p->access_permission_1 = 221 p->access_permission_2 = p->access_permission_3 = 222 PTE_AP_USER_RW_KERNEL_RW; 223 } else { 223 224 p->access_permission_0 = p->access_permission_1 = 224 225 p->access_permission_2 = p->access_permission_3 = 225 226 PTE_AP_USER_RO_KERNEL_RW; 226 227 } 227 if (flags & PAGE_WRITE) {228 p->access_permission_0 = p->access_permission_1 =229 p->access_permission_2 = p->access_permission_3 =230 PTE_AP_USER_RW_KERNEL_RW;231 }232 228 } 233 229 } -
kernel/arch/arm32/include/arch/mm/page_armv6.h
r973be387 r4b1c7c6f 171 171 const unsigned np = (p->descriptor_type == PTE_DESCRIPTOR_NOT_PRESENT); 172 172 173 return (np << PAGE_ PRESENT_SHIFT) | (1 << PAGE_USER_SHIFT) |174 (1 << PAGE_ READ_SHIFT) | (1 << PAGE_WRITE_SHIFT) |173 return (np << PAGE_NOT_PRESENT_SHIFT) | (1 << PAGE_USER_SHIFT) | 174 (1 << PAGE_WRITE_SHIFT) | 175 175 (1 << PAGE_EXEC_SHIFT) | (1 << PAGE_CACHEABLE_SHIFT); 176 176 } … … 190 190 const unsigned ap1 = p->access_permission_1; 191 191 192 return ((dt == PTE_DESCRIPTOR_NOT_PRESENT) << PAGE_ PRESENT_SHIFT) |192 return ((dt == PTE_DESCRIPTOR_NOT_PRESENT) << PAGE_NOT_PRESENT_SHIFT) | 193 193 ((dt != PTE_DESCRIPTOR_SMALL_PAGE_NX) << PAGE_EXEC_SHIFT) | 194 ((ap0 == PTE_AP0_USER_LIMITED_KERNEL_FULL) << PAGE_READ_SHIFT) |195 ((ap0 == PTE_AP0_USER_FULL_KERNEL_FULL) << PAGE_READ_SHIFT) |196 ((ap0 == PTE_AP0_USER_NO_KERNEL_FULL) << PAGE_READ_SHIFT) |197 194 ((ap0 != PTE_AP0_USER_NO_KERNEL_FULL) << PAGE_USER_SHIFT) | 198 195 (((ap1 != PTE_AP1_RO) && (ap0 == PTE_AP0_USER_FULL_KERNEL_FULL)) << PAGE_WRITE_SHIFT) | -
kernel/arch/arm32/src/mach/beagleboardxm/beagleboardxm.c
r973be387 r4b1c7c6f 101 101 beagleboard.irc_addr = 102 102 (void *) km_map(AMDM37x_IRC_BASE_ADDRESS, AMDM37x_IRC_SIZE, 103 PAGE_NOT_CACHEABLE);103 0); 104 104 assert(beagleboard.irc_addr); 105 105 omap_irc_init(beagleboard.irc_addr); -
kernel/arch/arm32/src/mach/beaglebone/beaglebone.c
r973be387 r4b1c7c6f 87 87 { 88 88 bbone.irc_addr = (void *) km_map(AM335x_IRC_BASE_ADDRESS, 89 AM335x_IRC_SIZE, PAGE_NOT_CACHEABLE);89 AM335x_IRC_SIZE, 0); 90 90 91 91 bbone.cm_per_addr = (void *) km_map(AM335x_CM_PER_BASE_ADDRESS, 92 AM335x_CM_PER_SIZE, PAGE_NOT_CACHEABLE);92 AM335x_CM_PER_SIZE, 0); 93 93 94 94 bbone.cm_dpll_addr = (void *) km_map(AM335x_CM_DPLL_BASE_ADDRESS, 95 AM335x_CM_DPLL_SIZE, PAGE_NOT_CACHEABLE);95 AM335x_CM_DPLL_SIZE, 0); 96 96 97 97 bbone.ctrl_module = (void *) km_map(AM335x_CTRL_MODULE_BASE_ADDRESS, 98 AM335x_CTRL_MODULE_SIZE, PAGE_NOT_CACHEABLE);98 AM335x_CTRL_MODULE_SIZE, 0); 99 99 100 100 assert(bbone.irc_addr != NULL); -
kernel/arch/arm32/src/mach/gta02/gta02.c
r973be387 r4b1c7c6f 103 103 104 104 gta02_timer = (void *) km_map(S3C24XX_TIMER_ADDRESS, PAGE_SIZE, 105 PAGE_NOT_CACHEABLE);105 0); 106 106 irqc_regs = (void *) km_map(S3C24XX_IRQC_ADDRESS, PAGE_SIZE, 107 PAGE_NOT_CACHEABLE);107 0); 108 108 109 109 /* Initialize interrupt controller. */ -
kernel/arch/arm32/src/mach/integratorcp/integratorcp.c
r973be387 r4b1c7c6f 135 135 { 136 136 icp.hw_map.uart = km_map(ICP_UART, PAGE_SIZE, 137 PAGE_WRITE | PAGE_NOT_CACHEABLE);138 icp.hw_map.kbd_ctrl = km_map(ICP_KBD, PAGE_SIZE, PAGE_NOT_CACHEABLE);137 PAGE_WRITE); 138 icp.hw_map.kbd_ctrl = km_map(ICP_KBD, PAGE_SIZE, 0); 139 139 icp.hw_map.kbd_stat = icp.hw_map.kbd_ctrl + ICP_KBD_STAT; 140 140 icp.hw_map.kbd_data = icp.hw_map.kbd_ctrl + ICP_KBD_DATA; 141 141 icp.hw_map.kbd_intstat = icp.hw_map.kbd_ctrl + ICP_KBD_INTR_STAT; 142 142 icp.hw_map.rtc = km_map(ICP_RTC, PAGE_SIZE, 143 PAGE_WRITE | PAGE_NOT_CACHEABLE);143 PAGE_WRITE); 144 144 icp.hw_map.rtc1_load = icp.hw_map.rtc + ICP_RTC1_LOAD_OFFSET; 145 145 icp.hw_map.rtc1_read = icp.hw_map.rtc + ICP_RTC1_READ_OFFSET; … … 150 150 151 151 icp.hw_map.irqc = km_map(ICP_IRQC, PAGE_SIZE, 152 PAGE_WRITE | PAGE_NOT_CACHEABLE);152 PAGE_WRITE); 153 153 icp.hw_map.irqc_mask = icp.hw_map.irqc + ICP_IRQC_MASK_OFFSET; 154 154 icp.hw_map.irqc_unmask = icp.hw_map.irqc + ICP_IRQC_UNMASK_OFFSET; 155 155 icp.hw_map.cmcr = km_map(ICP_CMCR, PAGE_SIZE, 156 PAGE_WRITE | PAGE_NOT_CACHEABLE);156 PAGE_WRITE); 157 157 icp.hw_map.sdramcr = icp.hw_map.cmcr + ICP_SDRAMCR_OFFSET; 158 158 icp.hw_map.vga = km_map(ICP_VGA, PAGE_SIZE, 159 PAGE_WRITE | PAGE_NOT_CACHEABLE);159 PAGE_WRITE); 160 160 161 161 hw_map_init_called = true; -
kernel/arch/arm32/src/mach/raspberrypi/raspberrypi.c
r973be387 r4b1c7c6f 102 102 /* Initialize interrupt controller */ 103 103 raspi.irc = (void *) km_map(BCM2835_IRC_ADDR, sizeof(bcm2835_irc_t), 104 PAGE_NOT_CACHEABLE);104 0); 105 105 assert(raspi.irc); 106 106 bcm2835_irc_init(raspi.irc); … … 109 109 raspi.timer = (void *) km_map(BCM2835_TIMER_ADDR, 110 110 sizeof(bcm2835_timer_t), 111 PAGE_NOT_CACHEABLE);111 0); 112 112 } 113 113 -
kernel/arch/arm32/src/ras.c
r973be387 r4b1c7c6f 57 57 58 58 ras_page = (uintptr_t *) km_map(frame, 59 PAGE_SIZE, PAGE_ READ | PAGE_WRITE | PAGE_USER | PAGE_CACHEABLE);59 PAGE_SIZE, PAGE_WRITE | PAGE_USER | PAGE_CACHEABLE); 60 60 61 61 memsetb(ras_page, PAGE_SIZE, 0); -
kernel/arch/ia32/include/arch/mm/page.h
r973be387 r4b1c7c6f 109 109 get_pt_flags((pte_t *) (ptl0), (size_t) (i)) 110 110 #define GET_PTL2_FLAGS_ARCH(ptl1, i) \ 111 PAGE_PRESENT111 0 112 112 #define GET_PTL3_FLAGS_ARCH(ptl2, i) \ 113 PAGE_PRESENT113 0 114 114 #define GET_FRAME_FLAGS_ARCH(ptl3, i) \ 115 115 get_pt_flags((pte_t *) (ptl3), (size_t) (i)) … … 185 185 186 186 return ((!p->page_cache_disable) << PAGE_CACHEABLE_SHIFT | 187 (!p->present) << PAGE_ PRESENT_SHIFT |187 (!p->present) << PAGE_NOT_PRESENT_SHIFT | 188 188 p->uaccessible << PAGE_USER_SHIFT | 189 1 << PAGE_READ_SHIFT |190 189 p->writeable << PAGE_WRITE_SHIFT | 191 190 1 << PAGE_EXEC_SHIFT | -
kernel/arch/ia32/src/mm/page.c
r973be387 r4b1c7c6f 70 70 for (cur = 0; cur < min(config.identity_size, config.physmem_end); 71 71 cur += FRAME_SIZE) { 72 flags = PAGE_GLOBAL | PAGE_CACHEABLE | PAGE_WRITE | PAGE_READ;72 flags = PAGE_GLOBAL | PAGE_CACHEABLE | PAGE_WRITE; 73 73 page_mapping_insert(AS_KERNEL, PA2KA(cur), cur, flags); 74 74 } -
kernel/arch/ia32/src/smp/smp.c
r973be387 r4b1c7c6f 75 75 76 76 if (config.cpu_count > 1) { 77 l_apic = (uint32_t *) km_map((uintptr_t) l_apic, PAGE_SIZE,78 PAGE_ WRITE | PAGE_NOT_CACHEABLE);79 io_apic = (uint32_t *) km_map((uintptr_t) io_apic, PAGE_SIZE,80 PAGE_ WRITE | PAGE_NOT_CACHEABLE);77 l_apic = (uint32_t *) km_map((uintptr_t) l_apic, 78 PAGE_SIZE, PAGE_WRITE); 79 io_apic = (uint32_t *) km_map((uintptr_t) io_apic, 80 PAGE_SIZE, PAGE_WRITE); 81 81 } 82 82 } -
kernel/arch/ia32/src/vreg.c
r973be387 r4b1c7c6f 68 68 69 69 page = (uint32_t *) km_map(frame, PAGE_SIZE, 70 PAGE_ READ | PAGE_WRITE | PAGE_USER | PAGE_CACHEABLE);70 PAGE_WRITE | PAGE_USER | PAGE_CACHEABLE); 71 71 72 72 gdt_setbase(&gdt_p[VREG_DES], (uintptr_t) page); -
kernel/arch/ia64/src/ia64.c
r973be387 r4b1c7c6f 106 106 { 107 107 uintptr_t IOSAPIC = km_map(iosapic_base, PAGE_SIZE, 108 PAGE_WRITE | PAGE_NOT_CACHEABLE);108 PAGE_WRITE); 109 109 int i; 110 110 … … 135 135 /* Map the page with legacy I/O. */ 136 136 legacyio_virt_base = km_map(LEGACYIO_PHYS_BASE, LEGACYIO_SIZE, 137 PAGE_WRITE | PAGE_NOT_CACHEABLE);137 PAGE_WRITE); 138 138 139 139 iosapic_init(); -
kernel/arch/mips32/include/arch/mm/page.h
r973be387 r4b1c7c6f 114 114 get_pt_flags((pte_t *) (ptl0), (size_t) (i)) 115 115 #define GET_PTL2_FLAGS_ARCH(ptl1, i) \ 116 PAGE_PRESENT116 0 117 117 #define GET_PTL3_FLAGS_ARCH(ptl2, i) \ 118 PAGE_PRESENT118 0 119 119 #define GET_FRAME_FLAGS_ARCH(ptl3, i) \ 120 120 get_pt_flags((pte_t *) (ptl3), (size_t) (i)) … … 167 167 168 168 return ((p->cacheable << PAGE_CACHEABLE_SHIFT) | 169 ((!p->p) << PAGE_ PRESENT_SHIFT) |169 ((!p->p) << PAGE_NOT_PRESENT_SHIFT) | 170 170 (1 << PAGE_USER_SHIFT) | 171 (1 << PAGE_READ_SHIFT) |172 171 ((p->w) << PAGE_WRITE_SHIFT) | 173 172 (1 << PAGE_EXEC_SHIFT) | -
kernel/arch/ppc32/include/arch/mm/page.h
r973be387 r4b1c7c6f 111 111 112 112 #define GET_PTL2_FLAGS_ARCH(ptl1, i) \ 113 PAGE_PRESENT113 0 114 114 115 115 #define GET_PTL3_FLAGS_ARCH(ptl2, i) \ 116 PAGE_PRESENT116 0 117 117 118 118 #define GET_FRAME_FLAGS_ARCH(ptl3, i) \ … … 167 167 168 168 return (((!entry->page_cache_disable) << PAGE_CACHEABLE_SHIFT) | 169 ((!entry->present) << PAGE_ PRESENT_SHIFT) |169 ((!entry->present) << PAGE_NOT_PRESENT_SHIFT) | 170 170 (1 << PAGE_USER_SHIFT) | 171 (1 << PAGE_READ_SHIFT) |172 171 (1 << PAGE_WRITE_SHIFT) | 173 172 (1 << PAGE_EXEC_SHIFT) | -
kernel/arch/ppc32/src/drivers/pic.c
r973be387 r4b1c7c6f 42 42 void pic_init(uintptr_t base, size_t size, cir_t *cir, void **cir_arg) 43 43 { 44 pic = (uint32_t *) km_map(base, size, PAGE_WRITE | PAGE_NOT_CACHEABLE);44 pic = (uint32_t *) km_map(base, size, PAGE_WRITE); 45 45 *cir = pic_ack_interrupt; 46 46 *cir_arg = NULL; -
kernel/arch/ppc32/src/ppc32.c
r973be387 r4b1c7c6f 242 242 243 243 cuda_t *cuda = (cuda_t *) (km_map(aligned_addr, offset + size, 244 PAGE_WRITE | PAGE_NOT_CACHEABLE) + offset);244 PAGE_WRITE) + offset); 245 245 246 246 /* Initialize I/O controller */ -
kernel/arch/riscv64/include/arch/mm/page.h
r973be387 r4b1c7c6f 82 82 83 83 /* Flags mask for non-leaf page table entries */ 84 #define NON_LEAF_MASK (~(PAGE_ READ | PAGE_WRITE | PAGE_EXEC))84 #define NON_LEAF_MASK (~(PAGE_WRITE | PAGE_EXEC)) 85 85 86 86 /* Get PTE address accessors for each level. */ … … 183 183 pte_t *entry = &pt[i]; 184 184 185 return (((!entry->valid) << PAGE_ PRESENT_SHIFT) |185 return (((!entry->valid) << PAGE_NOT_PRESENT_SHIFT) | 186 186 (entry->user << PAGE_USER_SHIFT) | 187 (entry->readable << PAGE_READ_SHIFT) |188 187 (entry->writable << PAGE_WRITE_SHIFT) | 189 188 (entry->executable << PAGE_EXEC_SHIFT) | … … 196 195 197 196 entry->valid = !(flags & PAGE_NOT_PRESENT); 198 entry->readable = (flags & PAGE_READ) != 0;197 entry->readable = 1; 199 198 entry->writable = (flags & PAGE_WRITE) != 0; 200 199 entry->executable = (flags & PAGE_EXEC) != 0; -
kernel/arch/riscv64/src/mm/page.c
r973be387 r4b1c7c6f 63 63 cur += FRAME_SIZE) 64 64 page_mapping_insert(AS_KERNEL, PA2KA(cur), cur, 65 PAGE_GLOBAL | PAGE_CACHEABLE | PAGE_EXEC | PAGE_WRITE | PAGE_READ);65 PAGE_GLOBAL | PAGE_CACHEABLE | PAGE_EXEC | PAGE_WRITE); 66 66 67 67 page_table_unlock(AS_KERNEL, true); -
kernel/arch/sparc64/src/drivers/kbd.c
r973be387 r4b1c7c6f 119 119 120 120 ioport8_t *ns16550 = (ioport8_t *) (km_map(aligned_addr, offset + size, 121 PAGE_WRITE | PAGE_NOT_CACHEABLE) + offset);121 PAGE_WRITE) + offset); 122 122 123 123 ns16550_instance_t *ns16550_instance = ns16550_init(ns16550, 0, inr, cir, -
kernel/arch/sparc64/src/drivers/pci.c
r973be387 r4b1c7c6f 110 110 pci->op = &pci_sabre_ops; 111 111 pci->reg = (uint64_t *) km_map(paddr, reg[SABRE_INTERNAL_REG].size, 112 PAGE_WRITE | PAGE_NOT_CACHEABLE);112 PAGE_WRITE); 113 113 114 114 return pci; … … 152 152 pci->op = &pci_psycho_ops; 153 153 pci->reg = (uint64_t *) km_map(paddr, reg[PSYCHO_INTERNAL_REG].size, 154 PAGE_WRITE | PAGE_NOT_CACHEABLE);154 PAGE_WRITE); 155 155 156 156 return pci; -
kernel/genarch/include/genarch/drivers/amdm37x/gpt.h
r973be387 r4b1c7c6f 208 208 // TODO find a nicer way to setup 32kHz clock source for timer1 209 209 // reg 0x48004C40 is CM_CLKSEL_WKUP see page 485 of the manual 210 ioport32_t *clksel = (void*) km_map(0x48004C40, 4, PAGE_NOT_CACHEABLE);210 ioport32_t *clksel = (void*) km_map(0x48004C40, 4, 0); 211 211 *clksel &= ~1; 212 212 km_unmap((uintptr_t)clksel, 4); … … 214 214 assert(timer); 215 215 /* Map control register */ 216 timer->regs = (void*) km_map(ioregs, iosize, PAGE_NOT_CACHEABLE);216 timer->regs = (void*) km_map(ioregs, iosize, 0); 217 217 218 218 /* Reset the timer */ -
kernel/genarch/src/acpi/acpi.c
r973be387 r4b1c7c6f 104 104 /* Start with mapping the header only. */ 105 105 vhdr = (struct acpi_sdt_header *) km_map((uintptr_t) psdt, 106 sizeof(struct acpi_sdt_header), PAGE_READ | PAGE_NOT_CACHEABLE);106 sizeof(struct acpi_sdt_header), 0); 107 107 108 108 /* Now we can map the entire structure. */ 109 109 vsdt = (struct acpi_sdt_header *) km_map((uintptr_t) psdt, 110 vhdr->length, PAGE_WRITE | PAGE_NOT_CACHEABLE);110 vhdr->length, PAGE_WRITE); 111 111 112 112 // TODO: do not leak vtmp -
kernel/genarch/src/drivers/am335x/timer.c
r973be387 r4b1c7c6f 100 100 size = regs_map[id].size; 101 101 102 timer->regs = (void *) km_map(base_addr, size, PAGE_NOT_CACHEABLE);102 timer->regs = (void *) km_map(base_addr, size, 0); 103 103 assert(timer->regs != NULL); 104 104 -
kernel/genarch/src/drivers/bcm2835/mbox.c
r973be387 r4b1c7c6f 91 91 92 92 fb_mbox = (void *) km_map(BCM2835_MBOX0_ADDR, sizeof(bcm2835_mbox_t), 93 PAGE_NOT_CACHEABLE);93 0); 94 94 95 95 fb_desc->width = 640; -
kernel/genarch/src/drivers/ega/ega.c
r973be387 r4b1c7c6f 601 601 instance->base = base; 602 602 instance->addr = (uint8_t *) km_map(addr, EGA_VRAM_SIZE, 603 PAGE_WRITE | PAGE_NOT_CACHEABLE);603 PAGE_WRITE); 604 604 if (!instance->addr) { 605 605 LOG("Unable to EGA video memory."); -
kernel/genarch/src/drivers/omap/uart.c
r973be387 r4b1c7c6f 87 87 { 88 88 assert(uart); 89 uart->regs = (void *)km_map(addr, size, PAGE_NOT_CACHEABLE);89 uart->regs = (void *)km_map(addr, size, 0); 90 90 91 91 assert(uart->regs); -
kernel/genarch/src/drivers/pl011/pl011.c
r973be387 r4b1c7c6f 100 100 assert(uart); 101 101 uart->regs = (void*)km_map(addr, sizeof(pl011_uart_regs_t), 102 PAGE_NOT_CACHEABLE);102 0); 103 103 assert(uart->regs); 104 104 -
kernel/genarch/src/drivers/s3c24xx/uart.c
r973be387 r4b1c7c6f 117 117 118 118 uart->io = (s3c24xx_uart_io_t *) km_map(paddr, PAGE_SIZE, 119 PAGE_WRITE | PAGE_NOT_CACHEABLE);119 PAGE_WRITE); 120 120 uart->indev = NULL; 121 121 -
kernel/genarch/src/fb/fb.c
r973be387 r4b1c7c6f 610 610 611 611 instance->addr = (uint8_t *) km_map((uintptr_t) props->addr, fbsize, 612 PAGE_WRITE | PAGE_NOT_CACHEABLE);612 PAGE_WRITE); 613 613 if (!instance->addr) { 614 614 LOG("Unable to map framebuffer."); -
kernel/genarch/src/mm/page_ht.c
r973be387 r4b1c7c6f 61 61 static void ht_mapping_remove(as_t *, uintptr_t); 62 62 static bool ht_mapping_find(as_t *, uintptr_t, bool, pte_t *); 63 static void ht_mapping_update(as_t *, uintptr_t, bool, pte_t *);63 static void ht_mapping_update(as_t *, uintptr_t, bool, const pte_t *); 64 64 static void ht_mapping_make_global(uintptr_t, size_t); 65 65 … … 268 268 * @param pte New PTE. 269 269 */ 270 void ht_mapping_update(as_t *as, uintptr_t page, bool nolock, pte_t *pte)270 void ht_mapping_update(as_t *as, uintptr_t page, bool nolock, const pte_t *pte) 271 271 { 272 272 irq_spinlock_lock(&page_ht_lock, true); -
kernel/genarch/src/mm/page_pt.c
r973be387 r4b1c7c6f 55 55 static void pt_mapping_remove(as_t *, uintptr_t); 56 56 static bool pt_mapping_find(as_t *, uintptr_t, bool, pte_t *pte); 57 static void pt_mapping_update(as_t *, uintptr_t, bool, pte_t *pte);57 static void pt_mapping_update(as_t *, uintptr_t, bool, const pte_t *pte); 58 58 static void pt_mapping_make_global(uintptr_t, size_t); 59 59 … … 353 353 * @param[in] pte New PTE. 354 354 */ 355 void pt_mapping_update(as_t *as, uintptr_t page, bool nolock, pte_t *pte)355 void pt_mapping_update(as_t *as, uintptr_t page, bool nolock, const pte_t *pte) 356 356 { 357 357 pte_t *t = pt_mapping_find_internal(as, page, nolock); … … 431 431 SET_PTL1_ADDRESS(ptl0, PTL0_INDEX(addr), KA2PA(l1)); 432 432 SET_PTL1_FLAGS(ptl0, PTL0_INDEX(addr), 433 PAGE_ PRESENT | PAGE_USER | PAGE_CACHEABLE |434 PAGE_EXEC | PAGE_WRITE | PAGE_READ);433 PAGE_USER | PAGE_CACHEABLE | 434 PAGE_EXEC | PAGE_WRITE); 435 435 } 436 436 } -
kernel/generic/include/mm/mm.h
r973be387 r4b1c7c6f 37 37 38 38 #define PAGE_CACHEABLE_SHIFT 0 39 #define PAGE_NOT_CACHEABLE_SHIFT PAGE_CACHEABLE_SHIFT 40 #define PAGE_PRESENT_SHIFT 1 41 #define PAGE_NOT_PRESENT_SHIFT PAGE_PRESENT_SHIFT 39 #define PAGE_NOT_PRESENT_SHIFT 1 42 40 #define PAGE_USER_SHIFT 2 43 #define PAGE_KERNEL_SHIFT PAGE_USER_SHIFT44 #define PAGE_READ_SHIFT 345 41 #define PAGE_WRITE_SHIFT 4 46 42 #define PAGE_EXEC_SHIFT 5 47 43 #define PAGE_GLOBAL_SHIFT 6 48 44 49 #define PAGE_NOT_CACHEABLE (0 << PAGE_CACHEABLE_SHIFT)50 45 #define PAGE_CACHEABLE (1 << PAGE_CACHEABLE_SHIFT) 51 52 #define PAGE_PRESENT (0 << PAGE_PRESENT_SHIFT) 53 #define PAGE_NOT_PRESENT (1 << PAGE_PRESENT_SHIFT) 54 46 #define PAGE_NOT_PRESENT (1 << PAGE_NOT_PRESENT_SHIFT) 55 47 #define PAGE_USER (1 << PAGE_USER_SHIFT) 56 #define PAGE_KERNEL (0 << PAGE_USER_SHIFT)57 58 #define PAGE_READ (1 << PAGE_READ_SHIFT)59 48 #define PAGE_WRITE (1 << PAGE_WRITE_SHIFT) 60 49 #define PAGE_EXEC (1 << PAGE_EXEC_SHIFT) 61 62 50 #define PAGE_GLOBAL (1 << PAGE_GLOBAL_SHIFT) 63 51 -
kernel/generic/include/mm/page.h
r973be387 r4b1c7c6f 49 49 void (*mapping_remove)(as_t *, uintptr_t); 50 50 bool (*mapping_find)(as_t *, uintptr_t, bool, pte_t *); 51 void (*mapping_update)(as_t *, uintptr_t, bool, pte_t *);51 void (*mapping_update)(as_t *, uintptr_t, bool, const pte_t *); 52 52 void (*mapping_make_global)(uintptr_t, size_t); 53 53 } page_mapping_operations_t; -
kernel/generic/src/console/cmd.c
r973be387 r4b1c7c6f 727 727 else 728 728 #endif 729 ptr = (uint8_t *) km_map( argv[0].intval, sizeof(uint8_t),730 PAGE_NOT_CACHEABLE);729 ptr = (uint8_t *) km_map( 730 argv[0].intval, sizeof(uint8_t), 0); 731 731 732 732 const uint8_t val = pio_read_8(ptr); … … 749 749 */ 750 750 static int cmd_pio_read_16(cmd_arg_t *argv) 751 { 752 uint16_t *ptr = NULL; 753 754 #ifdef IO_SPACE_BOUNDARY 755 if ((void *) argv->intval < IO_SPACE_BOUNDARY) 756 ptr = (void *) argv[0].intval; 757 else 758 #endif 759 ptr = (uint16_t *) km_map( 760 argv[0].intval, sizeof(uint16_t), 0); 761 762 const uint16_t val = pio_read_16(ptr); 763 printf("read %" PRIxn ": %" PRIx16 "\n", argv[0].intval, val); 764 765 #ifdef IO_SPACE_BOUNDARY 766 if ((void *) argv->intval < IO_SPACE_BOUNDARY) 767 return 1; 768 #endif 769 770 km_unmap((uintptr_t) ptr, sizeof(uint16_t)); 771 return 1; 772 } 773 774 /** Read 4 bytes from phys memory or io port. 775 * 776 * @param argv Argument vector. 777 * 778 * @return 0 on failure, 1 on success. 779 */ 780 static int cmd_pio_read_32(cmd_arg_t *argv) 781 { 782 uint32_t *ptr = NULL; 783 784 #ifdef IO_SPACE_BOUNDARY 785 if ((void *) argv->intval < IO_SPACE_BOUNDARY) 786 ptr = (void *) argv[0].intval; 787 else 788 #endif 789 ptr = (uint32_t *) km_map( 790 argv[0].intval, sizeof(uint32_t), 0); 791 792 const uint32_t val = pio_read_32(ptr); 793 printf("read %" PRIxn ": %" PRIx32 "\n", argv[0].intval, val); 794 795 #ifdef IO_SPACE_BOUNDARY 796 if ((void *) argv->intval < IO_SPACE_BOUNDARY) 797 return 1; 798 #endif 799 800 km_unmap((uintptr_t) ptr, sizeof(uint32_t)); 801 return 1; 802 } 803 804 /** Write 1 byte to phys memory or io port. 805 * 806 * @param argv Argument vector. 807 * 808 * @return 0 on failure, 1 on success. 809 */ 810 static int cmd_pio_write_8(cmd_arg_t *argv) 811 { 812 uint8_t *ptr = NULL; 813 814 #ifdef IO_SPACE_BOUNDARY 815 if ((void *) argv->intval < IO_SPACE_BOUNDARY) 816 ptr = (void *) argv[0].intval; 817 else 818 #endif 819 ptr = (uint8_t *) km_map(argv[0].intval, sizeof(uint8_t), 820 PAGE_WRITE); 821 822 printf("write %" PRIxn ": %" PRIx8 "\n", argv[0].intval, 823 (uint8_t) argv[1].intval); 824 pio_write_8(ptr, (uint8_t) argv[1].intval); 825 826 #ifdef IO_SPACE_BOUNDARY 827 if ((void *) argv->intval < IO_SPACE_BOUNDARY) 828 return 1; 829 #endif 830 831 km_unmap((uintptr_t) ptr, sizeof(uint8_t)); 832 return 1; 833 } 834 835 /** Write 2 bytes to phys memory or io port. 836 * 837 * @param argv Argument vector. 838 * 839 * @return 0 on failure, 1 on success. 840 */ 841 static int cmd_pio_write_16(cmd_arg_t *argv) 751 842 { 752 843 uint16_t *ptr = NULL; … … 758 849 #endif 759 850 ptr = (uint16_t *) km_map(argv[0].intval, sizeof(uint16_t), 760 PAGE_NOT_CACHEABLE); 761 762 const uint16_t val = pio_read_16(ptr); 763 printf("read %" PRIxn ": %" PRIx16 "\n", argv[0].intval, val); 851 PAGE_WRITE); 852 853 printf("write %" PRIxn ": %" PRIx16 "\n", argv[0].intval, 854 (uint16_t) argv[1].intval); 855 pio_write_16(ptr, (uint16_t) argv[1].intval); 764 856 765 857 #ifdef IO_SPACE_BOUNDARY … … 772 864 } 773 865 774 /** Read 4 bytes fromphys memory or io port.866 /** Write 4 bytes to phys memory or io port. 775 867 * 776 868 * @param argv Argument vector. … … 778 870 * @return 0 on failure, 1 on success. 779 871 */ 780 static int cmd_pio_ read_32(cmd_arg_t *argv)872 static int cmd_pio_write_32(cmd_arg_t *argv) 781 873 { 782 874 uint32_t *ptr = NULL; … … 788 880 #endif 789 881 ptr = (uint32_t *) km_map(argv[0].intval, sizeof(uint32_t), 790 PAGE_NOT_CACHEABLE); 791 792 const uint32_t val = pio_read_32(ptr); 793 printf("read %" PRIxn ": %" PRIx32 "\n", argv[0].intval, val); 794 795 #ifdef IO_SPACE_BOUNDARY 796 if ((void *) argv->intval < IO_SPACE_BOUNDARY) 797 return 1; 798 #endif 799 800 km_unmap((uintptr_t) ptr, sizeof(uint32_t)); 801 return 1; 802 } 803 804 /** Write 1 byte to phys memory or io port. 805 * 806 * @param argv Argument vector. 807 * 808 * @return 0 on failure, 1 on success. 809 */ 810 static int cmd_pio_write_8(cmd_arg_t *argv) 811 { 812 uint8_t *ptr = NULL; 813 814 #ifdef IO_SPACE_BOUNDARY 815 if ((void *) argv->intval < IO_SPACE_BOUNDARY) 816 ptr = (void *) argv[0].intval; 817 else 818 #endif 819 ptr = (uint8_t *) km_map(argv[0].intval, sizeof(uint8_t), 820 PAGE_NOT_CACHEABLE); 821 822 printf("write %" PRIxn ": %" PRIx8 "\n", argv[0].intval, 823 (uint8_t) argv[1].intval); 824 pio_write_8(ptr, (uint8_t) argv[1].intval); 825 826 #ifdef IO_SPACE_BOUNDARY 827 if ((void *) argv->intval < IO_SPACE_BOUNDARY) 828 return 1; 829 #endif 830 831 km_unmap((uintptr_t) ptr, sizeof(uint8_t)); 832 return 1; 833 } 834 835 /** Write 2 bytes to phys memory or io port. 836 * 837 * @param argv Argument vector. 838 * 839 * @return 0 on failure, 1 on success. 840 */ 841 static int cmd_pio_write_16(cmd_arg_t *argv) 842 { 843 uint16_t *ptr = NULL; 844 845 #ifdef IO_SPACE_BOUNDARY 846 if ((void *) argv->intval < IO_SPACE_BOUNDARY) 847 ptr = (void *) argv[0].intval; 848 else 849 #endif 850 ptr = (uint16_t *) km_map(argv[0].intval, sizeof(uint16_t), 851 PAGE_NOT_CACHEABLE); 852 853 printf("write %" PRIxn ": %" PRIx16 "\n", argv[0].intval, 854 (uint16_t) argv[1].intval); 855 pio_write_16(ptr, (uint16_t) argv[1].intval); 856 857 #ifdef IO_SPACE_BOUNDARY 858 if ((void *) argv->intval < IO_SPACE_BOUNDARY) 859 return 1; 860 #endif 861 862 km_unmap((uintptr_t) ptr, sizeof(uint16_t)); 863 return 1; 864 } 865 866 /** Write 4 bytes to phys memory or io port. 867 * 868 * @param argv Argument vector. 869 * 870 * @return 0 on failure, 1 on success. 871 */ 872 static int cmd_pio_write_32(cmd_arg_t *argv) 873 { 874 uint32_t *ptr = NULL; 875 876 #ifdef IO_SPACE_BOUNDARY 877 if ((void *) argv->intval < IO_SPACE_BOUNDARY) 878 ptr = (void *) argv[0].intval; 879 else 880 #endif 881 ptr = (uint32_t *) km_map(argv[0].intval, sizeof(uint32_t), 882 PAGE_NOT_CACHEABLE); 882 PAGE_WRITE); 883 883 884 884 printf("write %" PRIxn ": %" PRIx32 "\n", argv[0].intval, -
kernel/generic/src/ipc/irq.c
r973be387 r4b1c7c6f 93 93 #endif 94 94 ranges[i].base = km_map(pbase[i], ranges[i].size, 95 PAGE_ READ | PAGE_WRITE | PAGE_KERNEL | PAGE_NOT_CACHEABLE);95 PAGE_WRITE); 96 96 if (!ranges[i].base) { 97 97 ranges_unmap(ranges, i); -
kernel/generic/src/main/kinit.c
r973be387 r4b1c7c6f 250 250 uintptr_t page = km_map(init.tasks[i].paddr, 251 251 init.tasks[i].size, 252 PAGE_ READ | PAGE_WRITE | PAGE_CACHEABLE);252 PAGE_WRITE | PAGE_CACHEABLE); 253 253 assert(page); 254 254 -
kernel/generic/src/mm/as.c
r973be387 r4b1c7c6f 1217 1217 NO_TRACE static unsigned int area_flags_to_page_flags(unsigned int aflags) 1218 1218 { 1219 unsigned int flags = PAGE_USER | PAGE_PRESENT;1220 1221 if (aflags & AS_AREA_READ)1222 flags |= PAGE_READ;1219 unsigned int flags = PAGE_USER; 1220 1221 // TODO: AS_AREA_READ currently has no effect. 1222 // Readability is implied. 1223 1223 1224 1224 if (aflags & AS_AREA_WRITE) -
kernel/generic/src/mm/km.c
r973be387 r4b1c7c6f 257 257 if (frame) { 258 258 page = km_map(frame, PAGE_SIZE, 259 PAGE_ READ | PAGE_WRITE | PAGE_CACHEABLE);259 PAGE_WRITE | PAGE_CACHEABLE); 260 260 if (!page) { 261 261 frame_free(frame, 1); -
kernel/test/mm/mapping1.c
r973be387 r4b1c7c6f 44 44 45 45 uintptr_t page0 = km_map(frame, FRAME_SIZE, 46 PAGE_ READ | PAGE_WRITE | PAGE_CACHEABLE);46 PAGE_WRITE | PAGE_CACHEABLE); 47 47 TPRINTF("Virtual address %p mapped to physical address %p.\n", 48 48 (void *) page0, (void *) frame); 49 49 50 50 uintptr_t page1 = km_map(frame, FRAME_SIZE, 51 PAGE_ READ | PAGE_WRITE | PAGE_CACHEABLE);51 PAGE_WRITE | PAGE_CACHEABLE); 52 52 TPRINTF("Virtual address %p mapped to physical address %p.\n", 53 53 (void *) page1, (void *) frame);
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