Changeset 481c520 in mainline for arch/ia64/src/start.S
- Timestamp:
- 2006-02-27T12:30:11Z (19 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 02f441c0
- Parents:
- 4a2b52f
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
arch/ia64/src/start.S
r4a2b52f r481c520 27 27 # 28 28 29 30 29 #include <arch/register.h> 31 30 #include <arch/mm/page.h> … … 33 32 #include <mm/asid.h> 34 33 35 36 34 #define RR_MASK (0xFFFFFFFF00000002) 37 35 #define RID_SHIFT 8 38 36 #define PS_SHIFT 2 39 37 40 41 38 #define KERNEL_TRANSLATION_I 0x0010000000000661 42 39 #define KERNEL_TRANSLATION_D 0x0010000000000661 43 44 40 45 41 .section K_TEXT_START … … 51 47 .auto 52 48 53 # Fill TR.i and TR.d using Region Register #VRN_KERNEL49 # Fill TR.i and TR.d using Region Register #VRN_KERNEL 54 50 55 51 movl r8=(VRN_KERNEL<<VRN_SHIFT) … … 61 57 mov rr[r8]=r9 62 58 63 64 59 movl r8=(VRN_KERNEL<<VRN_SHIFT) 65 60 mov cr.ifa=r8 … … 68 63 movl r10=(KERNEL_TRANSLATION_I) 69 64 itr.i itr[r0]=r10 70 71 65 movl r10=(KERNEL_TRANSLATION_D) 72 66 itr.d dtr[r0]=r10 73 74 67 75 68 # initialize PSR … … 77 70 srlz.i 78 71 srlz.d 79 movl r10=(PSR_DT_MASK|PSR_RT_MASK|PSR_IT_MASK|PSR_IC_MASK) /* Enable paging*/72 movl r10=(PSR_DT_MASK|PSR_RT_MASK|PSR_IT_MASK|PSR_IC_MASK) /* Enable paging */ 80 73 mov r9=psr 81 74 or r10=r10,r9 … … 86 79 srlz.d 87 80 srlz.i 88 .explicit89 81 90 /*Return from interupt is only the way how to fill upper half word of PSR*/ 91 {rfi;;} 82 .explicit 83 /* 84 * Return From Interupt is the only the way to fill upper half word of PSR. 85 */ 86 rfi;; 92 87 {nop 0;;} 93 88 {nop 0;;} … … 100 95 101 96 .global paging_start 102 /*Now we are paging*/103 97 paging_start: 98 99 /* 100 * Now we are paging. 101 */ 102 104 103 {nop 0;;} 105 104 {nop 0;;} … … 111 110 {nop 0;;} 112 111 113 .auto114 115 112 # switch to register bank 1 116 113 bsw.1 … … 118 115 # initialize register stack 119 116 mov ar.rsc = r0 120 movl r8=(VRN_KERNEL<<VRN_SHIFT) 117 movl r8=(VRN_KERNEL<<VRN_SHIFT) ;; 121 118 mov ar.bspstore = r8 122 119 loadrs 123 120 124 .explicit125 121 # initialize memory stack to some sane value 126 122 movl r12 = stack0;; … … 131 127 movl r1 = _hardcoded_load_address ;; 132 128 133 134 135 # 136 # Initialize hardcoded_* variables. 137 # 129 /* 130 * Initialize hardcoded_* variables. 131 */ 138 132 movl r14 = _hardcoded_ktext_size 139 133 movl r15 = _hardcoded_kdata_size … … 147 141 st8 [r19] = r16 148 142 149 150 .auto 151 152 movl r18=main_bsp 153 mov b1=r18 143 movl r18=main_bsp ;; 144 mov b1=r18 ;; 154 145 br.call.sptk.many b0=b1 155 156 146 157 147 0:
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