Changeset 46c20c8 in mainline for kernel/arch/mips32/include/barrier.h

Timestamp:

2010-11-26T20:08:10Z (15 years ago)

Author:

Jiri Svoboda <jiri@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

45df59a

Parents:

fb150d78 (diff), ffdd2b9 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.

Message:

Merge mainline changes.

File:

• kernel/arch/mips32/include/barrier.h (modified) (2 diffs)

kernel/arch/mips32/include/barrier.h

@@ -27 +27 @@
  */
 
-/** @addtogroup mips32  
+/** @addtogroup mips32
  * @{
  */
@@ -39 +39 @@
  * TODO: implement true MIPS memory barriers for macros below.
  */
-#define CS_ENTER_BARRIER()      asm volatile ("" ::: "memory")
-#define CS_LEAVE_BARRIER()      asm volatile ("" ::: "memory")
+#define CS_ENTER_BARRIER()  asm volatile ("" ::: "memory")
+#define CS_LEAVE_BARRIER()  asm volatile ("" ::: "memory")
 
-#define memory_barrier()        asm volatile ("" ::: "memory")
-#define read_barrier()          asm volatile ("" ::: "memory")
-#define write_barrier()         asm volatile ("" ::: "memory")
+#define memory_barrier() asm volatile ("" ::: "memory")
+#define read_barrier()   asm volatile ("" ::: "memory")
+#define write_barrier()  asm volatile ("" ::: "memory")
 
 #define smc_coherence(a)