Changeset 3bacee1 in mainline for boot/arch/sparc64/src/ofw.c


Ignore:
Timestamp:
2018-04-12T16:27:17Z (7 years ago)
Author:
Jiri Svoboda <jiri@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
3cf22f9
Parents:
76d0981d
git-author:
Jiri Svoboda <jiri@…> (2018-04-11 19:25:33)
git-committer:
Jiri Svoboda <jiri@…> (2018-04-12 16:27:17)
Message:

Make ccheck-fix again and commit more good files.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • boot/arch/sparc64/src/ofw.c

    r76d0981d r3bacee1  
    8888                                 * "cpuid" for US-IV
    8989                                 */
    90                                 if ((ofw_get_property(child, "upa-portid", &mid, sizeof(mid)) <= 0)
    91                                     && (ofw_get_property(child, "portid", &mid, sizeof(mid)) <= 0)
    92                                     && (ofw_get_property(child, "cpuid", &mid, sizeof(mid)) <= 0))
     90                                if ((ofw_get_property(child, "upa-portid", &mid, sizeof(mid)) <= 0) &&
     91                                    (ofw_get_property(child, "portid", &mid, sizeof(mid)) <= 0) &&
     92                                    (ofw_get_property(child, "cpuid", &mid, sizeof(mid)) <= 0))
    9393                                        continue;
    9494
     
    117117
    118118        asm volatile (
    119                 "ldxa [%[zero]] %[asi], %[current_mid]\n"
    120                 : [current_mid] "=r" (current_mid)
    121                 : [zero] "r" (0),
    122                   [asi] "i" (ASI_ICBUS_CONFIG)
     119            "ldxa [%[zero]] %[asi], %[current_mid]\n"
     120            : [current_mid] "=r" (current_mid)
     121            : [zero] "r" (0),
     122              [asi] "i" (ASI_ICBUS_CONFIG)
    123123        );
    124124
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