Changeset 38a1a84 in mainline for arch/mips32/include/types.h

Timestamp:

2005-10-05T21:29:16Z (20 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

bca1b47

Parents:

49c1f93

Message:

MIPS32 memory management work.
Fix some bugs introduced yesterday (PTL3 index is indeed calculated by >> 14).
Introduce two new bits in pte_t (i.e. 'a' and 'w').
Implement TLB Invalid Exception and TLB Modified Exception. (Needs review and testing)

File:

• arch/mips32/include/types.h (modified) (1 diff)

arch/mips32/include/types.h

@@ -50 +50 @@
 typedef __u32 __native;
 
-typedef struct entry_lo pte_t;
+typedef struct pte pte_t;
 
 #endif