Changeset 3396f59 in mainline for arch/amd64/src/amd64.c

Timestamp:

2005-09-04T08:28:55Z (20 years ago)

Author:

Ondrej Palkovsky <ondrap@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

8ff2f3f

Parents:

005384ad

Message:

Fixed gdtr naming issues after ia32 changes.
Fixed stack alignment on new thread to by multiple of 16,
we are now ABI-correct and we do not #GP on va_arg to boot.
Fixed bad exception register names reporting.
Fixed bad _hardcoded_load_addr, which caused allocation of kernel text
frames.

File:

• arch/amd64/src/amd64.c (modified) (2 diffs)

arch/amd64/src/amd64.c

@@ -44 +44 @@
 #include <arch/cpuid.h>
 #include <arch/acpi/acpi.h>
+#include <panic.h>
 
 void arch_pre_mm_init(void)
@@ -50 +51 @@
 
         cpuid(AMD_CPUID_EXTENDED,&cpuid_s);
-        if (! (cpuid_s.cpuid_edx & (1<<AMD_EXT_NOEXECUTE))) {
-                printf("We do not support NX!!-----------\n");
-                printf("%X------\n",cpuid_s.cpuid_edx);
-                cpu_halt();
-        }
+        if (! (cpuid_s.cpuid_edx & (1<<AMD_EXT_NOEXECUTE)))
+                panic("Processor does not support No-execute pages.\n");
+
+        cpuid(INTEL_CPUID_STANDARD,&cpuid_s);
+        if (! (cpuid_s.cpuid_edx & (1<<INTEL_FXSAVE)))
+                panic("Processor does not support FXSAVE/FXRESTORE.\n");
+        
+        if (! (cpuid_s.cpuid_edx & (1<<INTEL_SSE2)))
+                panic("Processor does not support SSE2 instructions.\n");
+
+        /* Enable No-execute pages */
         set_efer_flag(AMD_NXE_FLAG);
+        /* Enable FPU */
+        cpu_setup_fpu();
 
         pm_init();