Changeset 25eec4ef in mainline for kernel/arch/amd64


Ignore:
Timestamp:
2013-04-19T18:38:18Z (13 years ago)
Author:
Jiri Svoboda <jiri@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
6d717a4
Parents:
a1e2df13 (diff), 289cb7dd (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.
Message:

Merge mainline chages.

Location:
kernel/arch/amd64
Files:
8 added
8 deleted
4 edited
26 moved

Legend:

Unmodified
Added
Removed

  • kernel/arch/amd64/Makefile.inc

    ra1e2df13 r25eec4ef  
    7676        arch/$(KARCH)/src/proc/thread.c \
    7777        arch/$(KARCH)/src/userspace.c \
    78         arch/$(KARCH)/src/syscall.c \
    79         arch/$(KARCH)/src/debugger.c
     78        arch/$(KARCH)/src/syscall.c
    8079
    8180ifeq ($(CONFIG_SMP),y)

  • kernel/arch/amd64/include/arch/istate.h

    ra1e2df13 r25eec4ef  
    6666} istate_t;
    6767
     68#define RPL_USER        3
     69
    6870/** Return true if exception happened while in userspace */
    6971NO_TRACE static inline int istate_from_uspace(istate_t *istate)
    7072{
    71         return !(istate->rip & UINT64_C(0x8000000000000000));
     73        return (istate->cs & RPL_USER) == RPL_USER;
    7274}
    7375

  • kernel/arch/amd64/src/amd64.c

    ra1e2df13 r25eec4ef  
    4343#include <arch/bios/bios.h>
    4444#include <arch/boot/boot.h>
    45 #include <arch/debugger.h>
    4645#include <arch/drivers/i8254.h>
    4746#include <arch/drivers/i8259.h>
    … …  
    161160#endif
    162161               
    163                 /* Enable debugger */
    164                 debugger_init();
    165162                /* Merge all memory zones to 1 big zone */
    166163                zone_merge_all();

  • kernel/arch/amd64/src/fpu_context.c

    ra1e2df13 r25eec4ef  
    5757{
    5858        /* TODO: Zero all SSE, MMX etc. registers */
     59        /* Default value of SCR register is 0x1f80,
     60         * it masks all FPU exceptions*/
    5961        asm volatile (
    6062                "fninit\n"

  • kernel/arch/amd64/src/mm/page.c

    ra1e2df13 r25eec4ef  
    7878void page_fault(unsigned int n, istate_t *istate)
    7979{
    80         uintptr_t page = read_cr2();
     80        uintptr_t badvaddr = read_cr2();
    8181       
    8282        if (istate->error_word & PFERR_CODE_RSVD)
    … …  
    9292                access = PF_ACCESS_READ;
    9393       
    94         if (as_page_fault(page, access, istate) == AS_PF_FAULT) {
    95                 fault_if_from_uspace(istate, "Page fault: %p.", (void *) page);
    96                 panic_memtrap(istate, access, page, NULL);
    97         }
     94        (void) as_page_fault(badvaddr, access, istate);
    9895}
    9996
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