Changeset 24241cf in mainline for arch/mips/include/cp0.h
- Timestamp:
- 2005-09-10T17:30:56Z (20 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- a1493d9
- Parents:
- 9060bd1
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
arch/mips/include/cp0.h
r9060bd1 r24241cf 39 39 #define cp0_status_fpu_bit (1<<29) 40 40 41 #define cp0_status_im7_shift 15 41 #define cp0_status_im_shift 8 42 #define cp0_status_im_mask 0xff00 43 42 44 /* 43 45 * Magic value for use in msim. … … 64 66 } 65 67 68 #define cp0_mask_all_int() cp0_status_write(cp0_status_read() & ~(cp0_status_im_mask)) 69 #define cp0_unmask_all_int() cp0_status_write(cp0_status_read() | cp0_status_im_mask) 70 #define cp0_mask_int(it) cp0_status_write(cp0_status_read() & ~(1<<(cp0_status_im_shift+(it)))) 71 #define cp0_unmask_int(it) cp0_status_write(cp0_status_read() | (1<<(cp0_status_im_shift+(it)))) 66 72 67 73
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