Changeset 23b7c02 in mainline for uspace/lib/c/generic/device/hw_res.c

Timestamp:

2013-09-04T06:58:57Z (12 years ago)

Author:

Manuele Conti <conti.ma@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

7664469

Parents:

caf5382 (diff), aa2a049 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.

Message:

Merge with Mainline changes.

File:

• uspace/lib/c/generic/device/hw_res.c (modified) (3 diffs)

uspace/lib/c/generic/device/hw_res.c

@@ -44 +44 @@
         
         async_exch_t *exch = async_exchange_begin(sess);
+        if (exch == NULL)
+                return ENOMEM;
         int rc = async_req_1_1(exch, DEV_IFACE_ID(HW_RES_DEV_IFACE),
             HW_RES_GET_RESOURCE_LIST, &count);
@@ -77 +79 @@
 {
         async_exch_t *exch = async_exchange_begin(sess);
+        if (exch == NULL)
+                return false;
         int rc = async_req_1_0(exch, DEV_IFACE_ID(HW_RES_DEV_IFACE),
             HW_RES_ENABLE_INTERRUPT);
@@ -84 +88 @@
 }
 
+/**
+ * Setup DMA channel to specified place and mode.
+ * @param channel DMA Channel 1,2,3 for 8 bit transfers, 5,6,7 for 16 bit.
+ * @param pa Physical address of the buffer. Must be < 16MB for 16 bit and < 1MB
+ *           for 8 bit transfers.
+ * @param size DMA buffer size, limited to 64K.
+ * @param mode Mode of the DMA channel:
+ *              - Read or Write
+ *              - Allow automatic reset
+ *              - Use address decrement instead of increment
+ *              - Use SINGLE/BLOCK/ON DEMAND transfer mode
+ * @return Error code.
+ */
+int hw_res_dma_channel_setup(async_sess_t *sess,
+    unsigned channel, uint32_t pa, uint32_t size, uint8_t mode)
+{
+        async_exch_t *exch = async_exchange_begin(sess);
+        if (exch == NULL)
+                return ENOMEM;
+        const uint32_t packed = (channel & 0xffff) | (mode << 16);
+        const int ret = async_req_4_0(exch, DEV_IFACE_ID(HW_RES_DEV_IFACE),
+            HW_RES_DMA_CHANNEL_SETUP, packed, pa, size);
+        async_exchange_end(exch);
+
+        return ret;
+}
+
+/**
+ * Query remaining bytes in the buffer.
+ * @param channel DMA Channel 1,2,3 for 8 bit transfers, 5,6,7 for 16 bit.
+ * @return Number of bytes remaining in the buffer(>=0) or error code(<0).
+ */
+int hw_res_dma_channel_remain(async_sess_t *sess, unsigned channel)
+{
+        async_exch_t *exch = async_exchange_begin(sess);
+        if (exch == NULL)
+                return ENOMEM;
+        sysarg_t remain;
+        const int ret = async_req_2_1(exch, DEV_IFACE_ID(HW_RES_DEV_IFACE),
+            HW_RES_DMA_CHANNEL_REMAIN, channel, &remain);
+        async_exchange_end(exch);
+        if (ret == EOK)
+                return remain;
+        return ret;
+}
+
 /** @}
  */