Changeset 119b46e in mainline for kernel/arch/mips32/include

Timestamp:

2013-03-22T17:25:04Z (13 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

59fb782, 8f9d70b, b183ce0a

Parents:

fa33ac4 (diff), 8fe2c9bd (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.

Message:

Merge from lp:~jakub/helenos/mips-malta.

Location:

kernel/arch/mips32/include/arch

Files:

• arch.h (modified) (2 diffs)
• cp0.h (modified) (1 diff)
• mach/malta/malta.h (added)
• mach/msim/msim.h (added)
• machine_func.h (added)
• mm/tlb.h (modified) (2 diffs)

kernel/arch/mips32/include/arch/arch.h

@@ -44 +44 @@
 extern size_t cpu_count;
 
+#if defined(MACHINE_lmalta) || defined(MACHINE_bmalta)
+extern size_t sdram_size;
+#endif
+
 typedef struct {
         void *addr;
@@ -51 +55 @@
 
 typedef struct {
+#if defined(MACHINE_lmalta) || defined(MACHINE_bmalta)
+        uint32_t sdram_size;
+#endif
         uint32_t cpumap;
         size_t cnt;

kernel/arch/mips32/include/arch/cp0.h

@@ -45 +45 @@
 #define cp0_status_im_shift  8
 #define cp0_status_im_mask   0xff00
+
+#define cp0_cause_ip_shift  8
+#define cp0_cause_ip_mask   0xff00
 
 #define cp0_cause_excno(cause)   ((cause >> 2) & 0x1f)

kernel/arch/mips32/include/arch/mm/tlb.h

@@ -41 +41 @@
 #include <trace.h>
 
+#if defined(PROCESSOR_R4000)
 #define TLB_ENTRY_COUNT  48
+#define TLB_INDEX_BITS   6
+#elif defined(PROCESSOR_4Kc)
+#define TLB_ENTRY_COUNT  16
+#define TLB_INDEX_BITS   4
+#else
+#error Please define TLB_ENTRY_COUNT for the target processor.
+#endif
 
-#define TLB_WIRED               1
-#define TLB_KSTACK_WIRED_INDEX  0
+#define TLB_WIRED               0 
 
 #define TLB_PAGE_MASK_4K    (0x000 << 13)
@@ -112 +119 @@
 #ifdef __BE__
                 unsigned p : 1;
-                unsigned : 25;
-                unsigned index : 6;
+                unsigned : 32 - TLB_INDEX_BITS - 1;
+                unsigned index : TLB_INDEX_BITS;
 #else
-                unsigned index : 6;
-                unsigned : 25;
+                unsigned index : TLB_INDEX_BITS;
+                unsigned : 32 - TLB_INDEX_BITS - 1;
                 unsigned p : 1;
 #endif