Changeset 02cacce in mainline
- Timestamp:
- 2011-05-18T18:24:22Z (13 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 030937e
- Parents:
- 45e0e07
- Location:
- uspace/drv
- Files:
-
- 13 edited
Legend:
- Unmodified
- Added
- Removed
-
uspace/drv/ohci/batch.c
r45e0e07 r02cacce 100 100 */ 101 101 usb_transfer_batch_t * batch_get(ddf_fun_t *fun, endpoint_t *ep, 102 char *buffer, size_t buffer_size, char* setup_buffer, size_t setup_size, 102 char *buffer, size_t buffer_size, 103 const char *setup_buffer, size_t setup_size, 103 104 usbhc_iface_transfer_in_callback_t func_in, 104 105 usbhc_iface_transfer_out_callback_t func_out, void *arg) … … 120 121 ohci_transfer_batch_dispose); 121 122 122 hcd_endpoint_t *hcd_ep = hcd_endpoint_get(ep);123 const hcd_endpoint_t *hcd_ep = hcd_endpoint_get(ep); 123 124 assert(hcd_ep); 124 125 … … 129 130 data->td_count = 130 131 ((buffer_size + OHCI_TD_MAX_TRANSFER - 1) / OHCI_TD_MAX_TRANSFER); 132 /* Control transfer need Setup and Status stage */ 131 133 if (ep->transfer_type == USB_TRANSFER_CONTROL) { 132 134 data->td_count += 2; … … 407 409 char *buffer = instance->data_buffer; 408 410 while (remain_size > 0) { 409 size_t transfer_size = remain_size > OHCI_TD_MAX_TRANSFER ?410 OHCI_TD_MAX_TRANSFER : remain_size;411 const size_t transfer_size = remain_size > OHCI_TD_MAX_TRANSFER 412 ? OHCI_TD_MAX_TRANSFER : remain_size; 411 413 412 414 td_init(data->tds[td_current], instance->ep->direction, -
uspace/drv/ohci/batch.h
r45e0e07 r02cacce 43 43 usb_transfer_batch_t * batch_get( 44 44 ddf_fun_t *fun, endpoint_t *ep, char *buffer, size_t size, 45 c har *setup_buffer, size_t setup_size,45 const char *setup_buffer, size_t setup_size, 46 46 usbhc_iface_transfer_in_callback_t func_in, 47 47 usbhc_iface_transfer_out_callback_t func_out, -
uspace/drv/ohci/endpoint_list.h
r45e0e07 r02cacce 42 42 43 43 /** Structure maintains both OHCI queue and software list of active endpoints.*/ 44 typedef struct endpoint_list 45 { 44 typedef struct endpoint_list { 46 45 /** Guard against add/remove races */ 47 46 fibril_mutex_t guard; … … 69 68 70 69 int endpoint_list_init(endpoint_list_t *instance, const char *name); 71 72 70 void endpoint_list_set_next(endpoint_list_t *instance, endpoint_list_t *next); 73 74 71 void endpoint_list_add_ep(endpoint_list_t *instance, hcd_endpoint_t *hcd_ep); 75 76 72 void endpoint_list_remove_ep(endpoint_list_t *instance, hcd_endpoint_t *hcd_ep); 77 73 #endif -
uspace/drv/ohci/hc.c
r45e0e07 r02cacce 51 51 static int hc_init_memory(hc_t *instance); 52 52 /*----------------------------------------------------------------------------*/ 53 /** Announce OHCI root hub to the DDF 54 * 55 * @param[in] instance OHCI driver intance 56 * @param[in] hub_fun DDF fuction representing OHCI root hub 57 * @return Error code 58 */ 53 59 int hc_register_hub(hc_t *instance, ddf_fun_t *hub_fun) 54 60 { … … 95 101 } 96 102 /*----------------------------------------------------------------------------*/ 103 /** Initialize OHCI hc driver structure 104 * 105 * @param[in] instance Memory place for the structure. 106 * @param[in] regs Address of the memory mapped I/O registers. 107 * @param[in] reg_size Size of the memory mapped area. 108 * @param[in] interrupts True if w interrupts should be used 109 * @return Error code 110 */ 97 111 int hc_init(hc_t *instance, uintptr_t regs, size_t reg_size, bool interrupts) 98 112 { … … 136 150 } 137 151 /*----------------------------------------------------------------------------*/ 152 /** Create end register endpoint structures 153 * 154 * @param[in] instance OHCI driver structure. 155 * @param[in] address USB address of the device. 156 * @param[in] endpoint USB endpoint number. 157 * @param[in] speed Communication speeed of the device. 158 * @param[in] type Endpoint's transfer type. 159 * @param[in] direction Endpoint's direction. 160 * @param[in] mps Maximum packet size the endpoint accepts. 161 * @param[in] size Maximum allowed buffer size. 162 * @param[in] interval Time between transfers(interrupt transfers only). 163 * @return Error code 164 */ 138 165 int hc_add_endpoint( 139 166 hc_t *instance, usb_address_t address, usb_endpoint_t endpoint, … … 193 220 } 194 221 /*----------------------------------------------------------------------------*/ 222 /** Dequeue and delete endpoint structures 223 * 224 * @param[in] instance OHCI hc driver structure. 225 * @param[in] address USB address of the device. 226 * @param[in] endpoint USB endpoint number. 227 * @param[in] direction Direction of the endpoint. 228 * @return Error code 229 */ 195 230 int hc_remove_endpoint(hc_t *instance, usb_address_t address, 196 231 usb_endpoint_t endpoint, usb_direction_t direction) … … 243 278 } 244 279 /*----------------------------------------------------------------------------*/ 280 /** Get access to endpoint structures 281 * 282 * @param[in] instance OHCI hc driver structure. 283 * @param[in] address USB address of the device. 284 * @param[in] endpoint USB endpoint number. 285 * @param[in] direction Direction of the endpoint. 286 * @param[out] bw Reserved bandwidth. 287 * @return Error code 288 */ 245 289 endpoint_t * hc_get_endpoint(hc_t *instance, usb_address_t address, 246 290 usb_endpoint_t endpoint, usb_direction_t direction, size_t *bw) … … 254 298 } 255 299 /*----------------------------------------------------------------------------*/ 300 /** Add USB transfer to the schedule. 301 * 302 * @param[in] instance OHCI hc driver structure. 303 * @param[in] batch Batch representing the transfer. 304 * @return Error code. 305 */ 256 306 int hc_schedule(hc_t *instance, usb_transfer_batch_t *batch) 257 307 { … … 260 310 assert(batch->ep); 261 311 262 /* check for root hub communication */312 /* Check for root hub communication */ 263 313 if (batch->ep->address == instance->rh.address) { 264 314 return rh_request(&instance->rh, batch); … … 268 318 list_append(&batch->link, &instance->pending_batches); 269 319 batch_commit(batch); 270 switch (batch->ep->transfer_type) { 320 321 /* Control and bulk schedules need a kick to start working */ 322 switch (batch->ep->transfer_type) 323 { 271 324 case USB_TRANSFER_CONTROL: 272 325 instance->registers->command_status |= CS_CLF; … … 278 331 break; 279 332 } 280 281 333 fibril_mutex_unlock(&instance->guard); 282 334 return EOK; 283 335 } 284 336 /*----------------------------------------------------------------------------*/ 337 /** Interrupt handling routine 338 * 339 * @param[in] instance OHCI hc driver structure. 340 * @param[in] status Value of the status register at the time of interrupt. 341 */ 285 342 void hc_interrupt(hc_t *instance, uint32_t status) 286 343 { … … 321 378 } 322 379 /*----------------------------------------------------------------------------*/ 380 /** Check status register regularly 381 * 382 * @param[in] instance OHCI hc driver structure. 383 * @return Error code 384 */ 323 385 int interrupt_emulator(hc_t *instance) 324 386 { … … 329 391 instance->registers->interrupt_status = status; 330 392 hc_interrupt(instance, status); 331 async_usleep( 50000);393 async_usleep(10000); 332 394 } 333 395 return EOK; 334 396 } 335 397 /*----------------------------------------------------------------------------*/ 398 /** Turn off any (BIOS)driver that might be in control of the device. 399 * 400 * @param[in] instance OHCI hc driver structure. 401 */ 336 402 void hc_gain_control(hc_t *instance) 337 403 { … … 383 449 } 384 450 /*----------------------------------------------------------------------------*/ 451 /** OHCI hw initialization routine. 452 * 453 * @param[in] instance OHCI hc driver structure. 454 */ 385 455 void hc_start_hw(hc_t *instance) 386 456 { … … 450 520 } 451 521 /*----------------------------------------------------------------------------*/ 522 /** Initialize schedule queues 523 * 524 * @param[in] instance OHCI hc driver structure 525 * @return Error code 526 */ 452 527 int hc_init_transfer_lists(hc_t *instance) 453 528 { … … 465 540 endpoint_list_fini(&instance->lists[USB_TRANSFER_BULK]); \ 466 541 } \ 542 return ret; \ 467 543 } while (0) 468 544 … … 478 554 } 479 555 /*----------------------------------------------------------------------------*/ 556 /** Initialize memory structures used by the OHCI hcd. 557 * 558 * @param[in] instance OHCI hc driver structure. 559 * @return Error code. 560 */ 480 561 int hc_init_memory(hc_t *instance) 481 562 { … … 504 585 /* Init interrupt code */ 505 586 instance->interrupt_code.cmds = instance->interrupt_commands; 587 instance->interrupt_code.cmdcount = OHCI_NEEDED_IRQ_COMMANDS; 506 588 { 507 589 /* Read status register */ … … 523 605 instance->interrupt_commands[2].srcarg = 2; 524 606 525 /* Write 607 /* Write-clean status register */ 526 608 instance->interrupt_commands[3].cmd = CMD_MEM_WRITE_A_32; 527 609 instance->interrupt_commands[3].srcarg = 1; … … 531 613 /* Accept interrupt */ 532 614 instance->interrupt_commands[4].cmd = CMD_ACCEPT; 533 534 instance->interrupt_code.cmdcount = OHCI_NEEDED_IRQ_COMMANDS;535 615 } 536 616 -
uspace/drv/ohci/hc.h
r45e0e07 r02cacce 53 53 #define OHCI_NEEDED_IRQ_COMMANDS 5 54 54 55 /** Main OHCI drier structure */ 55 56 typedef struct hc { 57 /** USB bus driver, devices and addresses */ 58 usb_device_keeper_t manager; 59 /** USB bus driver, endpoints */ 60 usb_endpoint_manager_t ep_manager; 61 62 /** Memory mapped I/O registers area */ 56 63 ohci_regs_t *registers; 64 /** Host controller communication area structure */ 57 65 hcca_t *hcca; 58 66 59 usb_address_t rh_address; 60 rh_t rh; 61 67 /** Transfer schedules */ 62 68 endpoint_list_t lists[4]; 69 /** List of active transfers */ 63 70 link_t pending_batches; 64 71 65 usb_device_keeper_t manager; 66 usb_endpoint_manager_t ep_manager; 72 /** Fibril for periodic checks if interrupts can't be used */ 67 73 fid_t interrupt_emulator; 74 75 /** Guards schedule and endpoint manipulation */ 68 76 fibril_mutex_t guard; 69 77 … … 73 81 /** Commands that form interrupt code */ 74 82 irq_cmd_t interrupt_commands[OHCI_NEEDED_IRQ_COMMANDS]; 83 84 /** USB hub emulation structure */ 85 rh_t rh; 75 86 } hc_t; 76 87 77 88 int hc_register_hub(hc_t *instance, ddf_fun_t *hub_fun); 78 79 89 int hc_init(hc_t *instance, uintptr_t regs, size_t reg_size, bool interrupts); 80 81 90 void hc_start_hw(hc_t *instance); 82 91 … … 85 94 * @param[in] instance Host controller structure to use. 86 95 */ 87 static inline void hc_fini(hc_t *instance) { /* TODO: implement*/ }; 96 static inline void hc_fini(hc_t *instance) 97 { /* TODO: implement*/ }; 88 98 89 99 int hc_add_endpoint(hc_t *instance, usb_address_t address, usb_endpoint_t ep, 90 100 usb_speed_t speed, usb_transfer_type_t type, usb_direction_t direction, 91 101 size_t max_packet_size, size_t size, unsigned interval); 92 93 102 int hc_remove_endpoint(hc_t *instance, usb_address_t address, 94 103 usb_endpoint_t endpoint, usb_direction_t direction); 95 96 104 endpoint_t * hc_get_endpoint(hc_t *instance, usb_address_t address, 97 105 usb_endpoint_t endpoint, usb_direction_t direction, size_t *bw); 98 106 99 107 int hc_schedule(hc_t *instance, usb_transfer_batch_t *batch); 100 101 108 void hc_interrupt(hc_t *instance, uint32_t status); 102 109 … … 107 114 */ 108 115 static inline hc_t * fun_to_hc(ddf_fun_t *fun) 109 { return (hc_t*)fun->driver_data; }116 { return fun->driver_data; } 110 117 #endif 111 118 /** -
uspace/drv/ohci/hcd_endpoint.c
r45e0e07 r02cacce 35 35 #include "hcd_endpoint.h" 36 36 37 /** Callback to set toggle on ED. 38 * 39 * @param[in] hcd_ep hcd endpoint structure 40 * @param[in] toggle new value of toggle bit 41 */ 37 42 static void hcd_ep_toggle_set(void *hcd_ep, int toggle) 38 43 { … … 42 47 ed_toggle_set(instance->ed, toggle); 43 48 } 49 /*----------------------------------------------------------------------------*/ 50 /** Callback to get value of toggle bit. 51 * 52 * @param[in] hcd_ep hcd endpoint structure 53 * @return Current value of toggle bit. 54 */ 44 55 static int hcd_ep_toggle_get(void *hcd_ep) 45 56 { … … 49 60 return ed_toggle_get(instance->ed); 50 61 } 51 52 62 /*----------------------------------------------------------------------------*/ 63 /** Creates new hcd endpoint representation. 64 * 65 * @param[in] ep USBD endpoint structure 66 * @return pointer to a new hcd endpoint structure, NULL on failure. 67 */ 53 68 hcd_endpoint_t * hcd_endpoint_assign(endpoint_t *ep) 54 69 { … … 78 93 } 79 94 /*----------------------------------------------------------------------------*/ 80 hcd_endpoint_t * hcd_endpoint_get(endpoint_t *ep) 81 { 82 assert(ep); 83 return ep->hc_data.data; 84 } 85 /*----------------------------------------------------------------------------*/ 95 /** Disposes assigned hcd endpoint structure 96 * 97 * @param[in] ep USBD endpoint structure 98 */ 86 99 void hcd_endpoint_clear(endpoint_t *ep) 87 100 { -
uspace/drv/ohci/hcd_endpoint.h
r45e0e07 r02cacce 42 42 #include "hw_struct/transfer_descriptor.h" 43 43 44 typedef struct hcd_endpoint 45 { 44 /** Connector structure linking ED to to prepared TD. */ 45 typedef struct hcd_endpoint { 46 /** OHCI endpoint descriptor */ 46 47 ed_t *ed; 48 /** Currently enqueued transfer descriptor */ 47 49 td_t *td; 50 /** Linked list used by driver software */ 48 51 link_t link; 49 52 } hcd_endpoint_t; 50 53 51 54 hcd_endpoint_t * hcd_endpoint_assign(endpoint_t *ep); 55 void hcd_endpoint_clear(endpoint_t *ep); 52 56 53 hcd_endpoint_t * hcd_endpoint_get(endpoint_t *ep); 57 /** Get and convert assigned hcd_endpoint_t structure 58 * @param[in] ep USBD endpoint structure. 59 * @return Pointer to assigned hcd endpoint structure 60 */ 61 static inline hcd_endpoint_t * hcd_endpoint_get(endpoint_t *ep) 62 { 63 assert(ep); 64 return ep->hc_data.data; 65 } 54 66 55 void hcd_endpoint_clear(endpoint_t *ep);56 67 #endif 57 68 /** -
uspace/drv/ohci/ohci_regs.h
r45e0e07 r02cacce 36 36 #include <stdint.h> 37 37 38 typedef struct ohci_regs 39 {38 /** OHCI memory mapped registers structure */ 39 typedef struct ohci_regs { 40 40 const volatile uint32_t revision; 41 41 volatile uint32_t control; -
uspace/drv/uhci-hcd/batch.c
r45e0e07 r02cacce 95 95 */ 96 96 usb_transfer_batch_t * batch_get(ddf_fun_t *fun, endpoint_t *ep, 97 char *buffer, size_t buffer_size, char* setup_buffer, size_t setup_size, 97 char *buffer, size_t buffer_size, 98 const char* setup_buffer, size_t setup_size, 98 99 usbhc_iface_transfer_in_callback_t func_in, 99 100 usbhc_iface_transfer_out_callback_t func_out, void *arg) -
uspace/drv/uhci-hcd/batch.h
r45e0e07 r02cacce 45 45 usb_transfer_batch_t * batch_get( 46 46 ddf_fun_t *fun, endpoint_t *ep, char *buffer, size_t size, 47 c har *setup_buffer, size_t setup_size,47 const char *setup_buffer, size_t setup_size, 48 48 usbhc_iface_transfer_in_callback_t func_in, 49 49 usbhc_iface_transfer_out_callback_t func_out, … … 55 55 56 56 void batch_control_write(usb_transfer_batch_t *instance); 57 58 57 void batch_control_read(usb_transfer_batch_t *instance); 59 58 60 59 void batch_interrupt_in(usb_transfer_batch_t *instance); 61 62 60 void batch_interrupt_out(usb_transfer_batch_t *instance); 63 61 64 62 void batch_bulk_in(usb_transfer_batch_t *instance); 65 66 63 void batch_bulk_out(usb_transfer_batch_t *instance); 67 64 -
uspace/drv/uhci-hcd/hc.c
r45e0e07 r02cacce 57 57 static int hc_debug_checker(void *arg); 58 58 /*----------------------------------------------------------------------------*/ 59 /** Initialize UHCI hc ddriver structure59 /** Initialize UHCI hc driver structure 60 60 * 61 61 * @param[in] instance Memory place to initialize. -
uspace/drv/uhci-hcd/hc.h
r45e0e07 r02cacce 95 95 #define UHCI_NEEDED_IRQ_COMMANDS 5 96 96 97 /* Main HCdriver structure */97 /** Main UHCI driver structure */ 98 98 typedef struct hc { 99 99 /** USB bus driver, devices and addresses */ -
uspace/drv/uhci-hcd/transfer_list.h
r45e0e07 r02cacce 43 43 * of currently executed transfers 44 44 */ 45 typedef struct transfer_list 46 { 45 typedef struct transfer_list { 47 46 /** Guard against multiple add/remove races */ 48 47 fibril_mutex_t guard;
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