| | 1 | = CPU Architecture Docs = |
| | 2 | |
| | 3 | == AMD64 == |
| | 4 | |
| | 5 | * [http://support.amd.com/us/Processor_TechDocs/24592.pdf AMD64 Architecture Programmer’s Manual Volume 1: Application Programming] |
| | 6 | * [http://support.amd.com/us/Processor_TechDocs/24593.pdf AMD64 Architecture Programmer’s Manual Volume 2: System Programming] |
| | 7 | * [http://support.amd.com/us/Processor_TechDocs/24594.pdf AMD64 Architecture Programmer’s Manual Volume 3: General-Purpose and System Instructions] |
| | 8 | * [http://support.amd.com/us/Processor_TechDocs/25112.PDF Software Optimization Guide for AMD64 Processors] |
| | 9 | * [http://support.amd.com/us/Processor_TechDocs/40546-PUB-Optguide_3-11_5-21-09.pdf Software Optimization Guide for AMD Family 10h Processors] |
| | 10 | * [http://www.x86-64.org/documentation/abi.pdf System V Application Binary Interface AMD64 Architecture Processor Supplement] |
| | 11 | |
| | 12 | == ARM == |
| | 13 | * ARM Architecture Reference Manual [officially not available any more] [http://www.google.com/search?q="ARM+Architecture+Reference+Manual"+filetype%3Apdf Google it!] |
| | 14 | * [https://silver.arm.com/download/download.tm?pv=1073121 ARMv5 Architecture Reference Manual] [registration required] [http://www.google.com/search?q="ARMv5+Architecture+Reference+Manual"+filetype%3Apdf Google it!] |
| | 15 | * [http://infocenter.arm.com/help/topic/com.arm.doc.ihi0042c/IHI0042C_aapcs.pdf Procedure Call Standard for the ARM Architecture] |
| | 16 | |
| | 17 | == IA-32 == |
| | 18 | |
| | 19 | * [http://www.intel.com/Assets/PDF/manual/253665.pdf Intel® 64 and IA-32 Architectures Software Developer’s Manual Volume 1: Basic Architecture] |
| | 20 | * [http://www.intel.com/Assets/PDF/manual/253666.pdf Intel® 64 and IA-32 Architectures Software Developer’s Manual Volume 2A: Instruction Set Reference, A-M] |
| | 21 | * [http://www.intel.com/Assets/PDF/manual/253667.pdf Intel® 64 and IA-32 Architectures Software Developer’s Manual Volume 2B: Instruction Set Reference, N-Z] |
| | 22 | * [http://www.intel.com/Assets/PDF/manual/253668.pdf Intel® 64 and IA-32 Architectures Software Developer’s Manual Volume 3A: System Programming Guide, Part 1] |
| | 23 | * [http://www.intel.com/Assets/PDF/manual/253669.pdf Intel® 64 and IA-32 Architectures Software Developer’s Manual Volume 3B: System Programming Guide, Part 2] |
| | 24 | * [http://www.intel.com/Assets/PDF/manual/248966.pdf Intel® 64 and IA-32 Architectures Optimization Reference Manual] |
| | 25 | * [http://download.intel.com/design/pentium/datashts/24201606.pdf MultiProcessor Specification] |
| | 26 | * [http://www.intel.com/design/chipsets/datashts/29056601.pdf 82093AA I/O ADVANCED PROGRAMMABLE INTERRUPT CONTROLLER (IOAPIC)] |
| | 27 | * [http://www.intel.com/design/chipsets/specupdt/29071001.pdf Intel 82093AA I/O Advanced Programmable Interrupt Controller (I/O APIC) Specification Update] |
| | 28 | * [http://www.sco.com/developers/devspecs/abi386-4.pdf SYSTEM V APPLICATION BINARY INTERFACE Intel386 Architecture Processor Supplement] |
| | 29 | |
| | 30 | == IA-64 == |
| | 31 | |
| | 32 | * [http://download.intel.com/design/Itanium/manuals/24531705.pdf Intel Itanium Architecture Software Developer’s Manual Volume 1: Application Architecture] |
| | 33 | * [http://download.intel.com/design/Itanium/manuals/24531805.pdf Intel Itanium Architecture Software Developer’s Manual Volume 2: System Architecture] |
| | 34 | * [http://download.intel.com/design/Itanium/manuals/24531905.pdf Intel Itanium Architecture Software Developer’s Manual Volume 3: Instruction Set Reference] |
| | 35 | * [http://download.intel.com/design/Itanium/Downloads/245358.pdf Intel Itanium Software Conventions & Runtime Architecture Guide] |
| | 36 | |
| | 37 | == MIPS == |
| | 38 | * [http://www.mips.com/media/files/archives/R4000MicroprocessorUsersManual.pdf MIPS R4000 Microprocessor User’s Manual] |
| | 39 | * [http://www.mips.com/secure-download/index.dot?product_name=/auth/MD00016%2D2B%2D4K%2DSUM%2D01.18.pdf MIPS32® 4K® Processor Core Family Software User's Manual] [registration required] [http://www.google.com/search?q="MIPS32®+4K®+Processor+Core+Family+Software+User's+Manual"+filetype%3Apdf Google it!] |
| | 40 | * [http://www.sco.com/developers/devspecs/mipsabi.pdf SYSTEM V APPLICATION BINARY INTERFACE MIPS RISC Processor Supplement] |
| | 41 | * [http://www.mips.com/products/architectures/ Official index of MIPS architectures with manuals] (registration required to download manuals) |
| | 42 | * [http://www.mips.com/media/files/MD00565-2B-MIPS32-QRC-01.01.pdf MIPS32 Instruction Set Quick Reference] |
| | 43 | * [http://dkrizanc.web.wesleyan.edu/courses/231/07/MIPS_Vol1.pdf MIPS32® Architecture for Programmers Volume I: Introduction to the MIPS32® Architecture] (unofficial copy) |
| | 44 | * [http://dkrizanc.web.wesleyan.edu/courses/231/07/MIPS_Vol2.pdf MIPS32® Architecture for Programmers Volume II: The MIPS32® Instruction Set] |
| | 45 | * [http://dkrizanc.web.wesleyan.edu/courses/231/07/MIPS_Vol3.pdf MIPS32® Architecture for Programmers Volume III: The MIPS32® Privileged Resource Architecture] |
| | 46 | * [http://scc.ustc.edu.cn/zlsc/lxwycj/200910/W020100308600768363997.pdf MIPS64® Architecture for Programmers Volume I: Introduction to the MIPS64™ Architecture] (unofficial copy) |
| | 47 | * [http://dslab.csie.ncu.edu.tw/~yu/course/ca/mips64v2.pdf MIPS64® Architecture for Programmers Volume II: The MIPS64® Instruction Set] (unofficial copy) |
| | 48 | * [http://scc.ustc.edu.cn/zlsc/lxwycj/200910/W020100308600770617815.pdf MIPS64® Architecture For Programmers Volume III: The MIPS64® and microMIPS64™ Privileged Resource Architecture] (unofficial copy) |
| | 49 | |
| | 50 | == PowerPC == |
| | 51 | |
| | 52 | * [http://www-01.ibm.com/chips/techlib/techlib.nsf/techdocs/DC3D43B729FDAD2C00257419006FB955/$file/970MP_um.2008MAR07_pub.pdf IBM PowerPC 970MP RISC Microprocessor User’s Manual] |
| | 53 | * [http://www-01.ibm.com/chips/techlib/techlib.nsf/techdocs/852569B20050FF778525699600719DF2/$file/6xx_pem.pdf PowerPC Microprocessor Family: The Programming Environments for 32-Bit Microprocessors] |
| | 54 | * [http://www-01.ibm.com/chips/techlib/techlib.nsf/techdocs/F7E732FF811F783187256FDD004D3797/$file/pem_64bit_v3.0.2005jul15.pdf PowerPC Microprocessor Family: The Programming Environments Manual for 64-bit Microprocessors] |
| | 55 | * [http://refspecs.freestandards.org/elf/elfspec_ppc.pdf SYSTEM V APPLICATION BINARY INTERFACE PowerPC Processor Supplement] |
| | 56 | |
| | 57 | |
| | 58 | == SPARC V9 == |
| | 59 | |
| | 60 | * [http://www.sparc.org/standards/SPARCV9.pdf The SPARC Architecture Manual Version 9] |
| | 61 | * [http://www.fujitsu.com/downloads/PRMPWR/JPS1-R1.0.4-Common-pub.pdf SPARC Joint Programming Specification (JPS1): Commonality] |
| | 62 | * UltraSPARC User’s Manual, UltraSPARC-I, UltraSPARC-II [officially not available any more] [http://www.google.com/search?q=%22UltraSPARC+User%27s+Manual+%22+filetype:pdf Google it!] |
| | 63 | * UltraSPARC-IIi User's Manual [officially not available any more] [http://www.google.com/search?hl=en&q=%22UltraSPARC-IIi+User%27s+Manual+%22+filetype%3Apdf Google it!] |
| | 64 | * UltraSPARC-IIe User's Manual [officially not available any more] [http://www.google.com/search?hl=en&q=%22UltraSPARC-IIe+User%27s+Manual+%22+filetype%3Apdf Google it!] |
| | 65 | * UltraSPARC-IIIi User's Manual [officially not available any more] [http://www.google.com/search?hl=en&q=%22UltraSPARC-IIIi+User%27s+Manual+%22+filetype%3Apdf Google it!] |
| | 66 | * UltraSPARC Architecture 2005, PE [official link broken] [http://www.google.com/search?q=allintitle%3A+%22UltraSPARC+Architecture+2005%22+filetype%3Apdf Google it!] |
| | 67 | * UltraSPARC Architecture 2005, HE [official link broken] |
| | 68 | * [http://www.opensparc.net/docs/UA2007-current-draft-P-EXT.pdf UltraSPARC Architecture 2007, PE] |
| | 69 | * [http://www.opensparc.net/docs/UA2007-current-draft-HP-EXT.pdf UltraSPARC Architecture 2007, HE] |
| | 70 | * [http://www.opensparc.net/docs/UST1-UASuppl-current-draft-P-EXT.pdf UltraSPARC T1 Supplement to the UltraSPARC Architecture 2005, PE] |
| | 71 | * [http://www.opensparc.net/docs/UST1-UASuppl-current-draft-HP-EXT.pdf UltraSPARC T1 Supplement to the UltraSPARC Architecture 2005, HE] |
| | 72 | * [http://www.opensparc.net/docs/UST2-UASuppl-current-draft-P-EXT.pdf UltraSPARC T2 Supplement to the UltraSPARC Architecture 2007, PE] |
| | 73 | * [http://www.opensparc.net/docs/UST2-UASuppl-current-draft-HP-EXT.pdf UltraSPARC T2 Supplement to the UltraSPARC Architecture 2007, HE] |
| | 74 | * [http://www.sparc.org/standards/SCD.2.4.ps.Z SPARC COMPLIANCE DEFINITION 2.4] |
| | 75 | * [http://wikis.sun.com/display/FOSSdocs/Home FOSS Open Hardware Documentation] |
