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Changeset f6cf76f in mainline


Ignore:
Timestamp:
2019-04-05T18:30:19Z (22 months ago)
Author:
Jakub Jermar <jakub@…>
Branches:
master
Children:
29beac8
Parents:
f4bb404
Message:

Move PIC spurious IRQ handling into arch code

As each architecture or even machine does IRQs differently, the genarch
i8259 driver cannot register the PIC spurious IRQ interrupt itself.

Location:
kernel
Files:
7 edited

Legend:

Unmodified
Added
Removed
  • kernel/arch/amd64/include/arch/interrupt.h

    rf4bb404 rf6cf76f  
    6161/* NS16550 at COM1 */
    6262#define IRQ_NS16550   4
    63 #define IRQ_PIC_SPUR 7
     63#define IRQ_PIC0_SPUR 7
    6464#define IRQ_MOUSE     12
     65#define IRQ_PIC1_SPUR 15
    6566
    6667/* This one must have four least significant bits set to ones */
     
    7778#define VECTOR_PF                 (IVT_EXCBASE + EXC_PF)
    7879#define VECTOR_CLK                (IVT_IRQBASE + IRQ_CLK)
    79 #define VECTOR_PIC_SPUR           (IVT_IRQBASE + IRQ_PIC_SPUR)
     80#define VECTOR_PIC0_SPUR          (IVT_IRQBASE + IRQ_PIC0_SPUR)
     81#define VECTOR_PIC1_SPUR          (IVT_IRQBASE + IRQ_PIC1_SPUR)
    8082#define VECTOR_SYSCALL            IVT_FREEBASE
    8183#define VECTOR_TLB_SHOOTDOWN_IPI  (IVT_FREEBASE + 1)
  • kernel/arch/amd64/src/interrupt.c

    rf4bb404 rf6cf76f  
    172172        bool ack = false;
    173173        assert(inum < IRQ_COUNT);
    174         assert((inum != IRQ_PIC_SPUR) && (inum != IRQ_PIC1));
     174        assert(inum != IRQ_PIC0_SPUR);
     175        assert(inum != IRQ_PIC1_SPUR);
     176        assert(inum != IRQ_PIC1);
    175177
    176178        irq_t *irq = irq_dispatch_and_lock(inum);
     
    201203}
    202204
     205static void pic_spurious(unsigned int n, istate_t *istate)
     206{
     207        /*
     208         * XXX: Examine ISR to figure out whether this is indeed a spurious
     209         *      or actual IRQ.
     210         */
     211#ifdef CONFIG_DEBUG
     212        log(LF_ARCH, LVL_DEBUG, "cpu%u: PIC spurious interrupt", CPU->id);
     213#endif
     214}
     215
    203216void interrupt_init(void)
    204217{
     
    209222
    210223        for (i = 0; i < IRQ_COUNT; i++) {
    211                 if ((i != IRQ_PIC_SPUR) && (i != IRQ_PIC1))
     224                if ((i != IRQ_PIC0_SPUR) && (i != IRQ_PIC1_SPUR)
     225                    && (i != IRQ_PIC1))
    212226                        exc_register(IVT_IRQBASE + i, "irq", true,
    213227                            (iroutine_t) irq_interrupt);
     
    218232        exc_register(VECTOR_SS, "ss_fault", true, (iroutine_t) ss_fault);
    219233        exc_register(VECTOR_GP, "gp_fault", true, (iroutine_t) gp_fault);
     234        exc_register(VECTOR_PIC0_SPUR, "pic0_spurious", true,
     235            (iroutine_t) pic_spurious);
     236        exc_register(VECTOR_PIC1_SPUR, "pic1_spurious", true,
     237            (iroutine_t) pic_spurious);
    220238
    221239#ifdef CONFIG_SMP
  • kernel/arch/ia32/include/arch/interrupt.h

    rf4bb404 rf6cf76f  
    6363/* NS16550 at COM1 */
    6464#define IRQ_NS16550   4
    65 #define IRQ_PIC_SPUR 7
     65#define IRQ_PIC0_SPUR 7
    6666#define IRQ_MOUSE     12
     67#define IRQ_PIC1_SPUR 15
    6768
    6869/* This one must have four least significant bits set to ones */
     
    8182#define VECTOR_XM                 (IVT_EXCBASE + EXC_XM)
    8283#define VECTOR_CLK                (IVT_IRQBASE + IRQ_CLK)
    83 #define VECTOR_PIC_SPUR           (IVT_IRQBASE + IRQ_PIC_SPUR)
     84#define VECTOR_PIC0_SPUR          (IVT_IRQBASE + IRQ_PIC0_SPUR)
     85#define VECTOR_PIC1_SPUR          (IVT_IRQBASE + IRQ_PIC1_SPUR)
    8486#define VECTOR_SYSCALL            IVT_FREEBASE
    8587#define VECTOR_TLB_SHOOTDOWN_IPI  (IVT_FREEBASE + 1)
  • kernel/arch/ia32/src/interrupt.c

    rf4bb404 rf6cf76f  
    192192        bool ack = false;
    193193        assert(inum < IRQ_COUNT);
    194         assert((inum != IRQ_PIC_SPUR) && (inum != IRQ_PIC1));
     194        assert(inum != IRQ_PIC0_SPUR);
     195        assert(inum != IRQ_PIC1_SPUR);
     196        assert(inum != IRQ_PIC1);
    195197
    196198        irq_t *irq = irq_dispatch_and_lock(inum);
     
    220222}
    221223
     224static void pic_spurious(unsigned int n, istate_t *istate)
     225{
     226        /*
     227         * XXX: Examine ISR to figure out whether this is indeed a spurious
     228         *      or actual IRQ.
     229         */
     230#ifdef CONFIG_DEBUG
     231        log(LF_ARCH, LVL_DEBUG, "cpu%u: PIC spurious interrupt", CPU->id);
     232#endif
     233}
     234
    222235void interrupt_init(void)
    223236{
     
    228241
    229242        for (i = 0; i < IRQ_COUNT; i++) {
    230                 if ((i != IRQ_PIC_SPUR) && (i != IRQ_PIC1))
     243                if ((i != IRQ_PIC0_SPUR) && (i != IRQ_PIC1_SPUR) &&
     244                    (i != IRQ_PIC1))
    231245                        exc_register(IVT_IRQBASE + i, "irq", true,
    232246                            (iroutine_t) irq_interrupt);
     
    239253        exc_register(VECTOR_GP, "gp_fault", true, (iroutine_t) gp_fault);
    240254        exc_register(VECTOR_XM, "simd_fp", true, (iroutine_t) simd_fp_exception);
     255        exc_register(VECTOR_PIC0_SPUR, "pic0_spurious", true,
     256            (iroutine_t) pic_spurious);
     257        exc_register(VECTOR_PIC1_SPUR, "pic1_spurious", true,
     258            (iroutine_t) pic_spurious);
    241259
    242260#ifdef CONFIG_SMP
  • kernel/arch/mips32/include/arch/mach/malta/malta.h

    rf4bb404 rf6cf76f  
    4545
    4646#define PIC0_BASE               (MALTA_PCI_BASE + 0x20)
     47#define PIC0_SPURIOUS_IRQ       7
    4748#define PIC1_BASE               (MALTA_PCI_BASE + 0xa0)
     49#define PIC1_SPURIOUS_IRQ       15
    4850
    4951#define ISA_IRQ_COUNT           16
  • kernel/arch/mips32/src/mach/malta/malta.c

    rf4bb404 rf6cf76f  
    7474{
    7575        uint8_t isa_irq = host2uint32_t_le(pio_read_32(GT64120_PCI0_INTACK));
     76        if (isa_irq == PIC0_SPURIOUS_IRQ || isa_irq == PIC1_SPURIOUS_IRQ) {
     77                /*
     78                 * XXX: Examine ISR to figure out whether this is indeed a
     79                 *      spurious or actual IRQ.
     80                 */
     81#ifdef CONFIG_DEBUG
     82                log(LF_ARCH, LVL_DEBUG, "cpu%u: PIC spurious interrupt",
     83                    CPU->id);
     84                return;
     85#endif
     86        }
    7687        irq_t *irq = irq_dispatch_and_lock(isa_irq);
    7788        if (irq) {
  • kernel/genarch/src/drivers/i8259/i8259.c

    rf4bb404 rf6cf76f  
    4343#include <interrupt.h>
    4444
    45 static void pic_spurious(unsigned int n, istate_t *istate);
    46 
    4745// XXX: need to change pic_* API to get rid of these
    4846static i8259_t *saved_pic0;
     
    7876        /* ICW4: i8086 mode */
    7977        pio_write_8(&pic1->port2, 1);
    80 
    81         /*
    82          * Register interrupt handler for the PIC spurious interrupt.
    83          *
    84          * XXX: This is currently broken. Both IRQ 7 and IRQ 15 can be spurious
    85          *      or can be actual interrupts. This needs to be detected when
    86          *      the interrupt happens by inspecting ISR.
    87          */
    88         exc_register(irq0_int + 7, "pic_spurious", false,
    89             (iroutine_t) pic_spurious);
    9078
    9179        pic_disable_irqs(0xffff);               /* disable all irq's */
     
    130118}
    131119
    132 void pic_spurious(unsigned int n __attribute__((unused)), istate_t *istate __attribute__((unused)))
    133 {
    134 #ifdef CONFIG_DEBUG
    135         log(LF_ARCH, LVL_DEBUG, "cpu%u: PIC spurious interrupt", CPU->id);
    136 #endif
    137 }
    138 
    139120/** @}
    140121 */
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