Changeset eaf5e86 in mainline


Ignore:
Timestamp:
2017-10-11T13:18:54Z (7 years ago)
Author:
Ondřej Hlavatý <aearsis@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
63adb18
Parents:
ac18b08
Message:

xhci: whitespace fixes

Location:
uspace/drv/bus/usb/xhci
Files:
10 edited

Legend:

Unmodified
Added
Removed
  • uspace/drv/bus/usb/xhci/endpoint.h

    rac18b08 reaf5e86  
    5656/** Connector structure linking endpoint context to the endpoint. */
    5757typedef struct xhci_endpoint {
    58   uint32_t slot_id;
     58        uint32_t slot_id;
    5959} xhci_endpoint_t;
    6060
     
    6464static inline xhci_endpoint_t * endpoint_get(const endpoint_t *ep)
    6565{
    66   assert(ep);
    67   return ep->hc_data.data;
     66        assert(ep);
     67        return ep->hc_data.data;
    6868}
    6969
  • uspace/drv/bus/usb/xhci/hc.h

    rac18b08 reaf5e86  
    4545
    4646typedef struct xhci_virt_device_ctx {
    47     xhci_device_ctx_t *dev_ctx;
    48     xhci_trb_ring_t *trs[XHCI_EP_COUNT];
     47        xhci_device_ctx_t *dev_ctx;
     48        xhci_trb_ring_t *trs[XHCI_EP_COUNT];
    4949} xhci_virt_device_ctx_t;
    5050
  • uspace/drv/bus/usb/xhci/hw_struct/common.h

    rac18b08 reaf5e86  
    8383static inline void xhci_qword_set_bits(xhci_qword_t *storage, uint64_t value, unsigned hi, unsigned lo)
    8484{
    85    const uint64_t mask = host2xhci(64, BIT_RANGE(uint64_t, hi, lo));
    86    const uint64_t set = host2xhci(64, value << lo);
    87    *storage = (*storage & ~mask) | set;
     85        const uint64_t mask = host2xhci(64, BIT_RANGE(uint64_t, hi, lo));
     86        const uint64_t set = host2xhci(64, value << lo);
     87        *storage = (*storage & ~mask) | set;
    8888}
    8989
  • uspace/drv/bus/usb/xhci/hw_struct/context.h

    rac18b08 reaf5e86  
    6565
    6666#define XHCI_EP_TYPE_SET(ctx, val) \
    67     xhci_dword_set_bits(&(ctx).data[1], val, 5, 3)
     67        xhci_dword_set_bits(&(ctx).data[1], val, 5, 3)
    6868#define XHCI_EP_MAX_PACKET_SIZE_SET(ctx, val) \
    69     xhci_dword_set_bits(&(ctx).data[1], val, 31, 16)
     69        xhci_dword_set_bits(&(ctx).data[1], val, 31, 16)
    7070#define XHCI_EP_MAX_BURST_SIZE_SET(ctx, val) \
    71     xhci_dword_set_bits(&(ctx).data[1], val, 15, 8)
     71        xhci_dword_set_bits(&(ctx).data[1], val, 15, 8)
    7272#define XHCI_EP_TR_DPTR_SET(ctx, val) \
    73     xhci_qword_set_bits(&(ctx).data2, (val >> 4), 63, 4)
     73        xhci_qword_set_bits(&(ctx).data2, (val >> 4), 63, 4)
    7474#define XHCI_EP_DCS_SET(ctx, val) \
    75     xhci_qword_set_bits(&(ctx).data2, val, 0, 0)
     75        xhci_qword_set_bits(&(ctx).data2, val, 0, 0)
    7676#define XHCI_EP_INTERVAL_SET(ctx, val) \
    77     xhci_dword_set_bits(&(ctx).data[0], val, 23, 16)
     77        xhci_dword_set_bits(&(ctx).data[0], val, 23, 16)
    7878#define XHCI_EP_MAX_P_STREAMS_SET(ctx, val) \
    79     xhci_dword_set_bits(&(ctx).data[0], val, 14, 10)
     79        xhci_dword_set_bits(&(ctx).data[0], val, 14, 10)
    8080#define XHCI_EP_MULT_SET(ctx, val) \
    81     xhci_dword_set_bits(&(ctx).data[0], val, 9, 8)
     81        xhci_dword_set_bits(&(ctx).data[0], val, 9, 8)
    8282#define XHCI_EP_ERROR_COUNT_SET(ctx, val) \
    83     xhci_dword_set_bits(&(ctx).data[1], val, 2, 1)
     83        xhci_dword_set_bits(&(ctx).data[1], val, 2, 1)
    8484
    8585#define XHCI_EP_STATE(ctx)              XHCI_DWORD_EXTRACT((ctx).data[0],  2,  0)
     
    108108
    109109#define XHCI_SLOT_ROOT_HUB_PORT_SET(ctx, val) \
    110     xhci_dword_set_bits(&(ctx).data[1], val, 23, 16)
     110        xhci_dword_set_bits(&(ctx).data[1], val, 23, 16)
    111111#define XHCI_SLOT_CTX_ENTRIES_SET(ctx, val) \
    112     xhci_dword_set_bits(&(ctx).data[0], val, 31, 27)
     112        xhci_dword_set_bits(&(ctx).data[0], val, 31, 27)
    113113#define XHCI_SLOT_ROUTE_STRING_SET(ctx, val) \
    114114        xhci_dword_set_bits(&(ctx).data[0], (val & 0xFFFFF), 19, 0)
  • uspace/drv/bus/usb/xhci/hw_struct/regs.h

    rac18b08 reaf5e86  
    499499 */
    500500typedef struct xhci_psi {
    501         xhci_dword_t psi;
     501        xhci_dword_t psi;
    502502} xhci_psi_t;
    503503
     
    547547
    548548static const xhci_sp_name_t xhci_name_usb = {
    549     .str = "USB "
     549        .str = "USB "
    550550};
    551551
  • uspace/drv/bus/usb/xhci/hw_struct/trb.h

    rac18b08 reaf5e86  
    170170static inline void xhci_trb_copy(xhci_trb_t *dst, xhci_trb_t *src)
    171171{
    172     /*
    173     * As we do not know, whether our architecture is capable of copying 16
    174     * bytes atomically, let's copy the fields one by one.
    175     */
    176     dst->parameter = src->parameter;
    177     dst->status = src->status;
    178     dst->control = src->control;
     172        /*
     173        * As we do not know, whether our architecture is capable of copying 16
     174        * bytes atomically, let's copy the fields one by one.
     175        */
     176        dst->parameter = src->parameter;
     177        dst->status = src->status;
     178        dst->control = src->control;
    179179}
    180180
  • uspace/drv/bus/usb/xhci/main.c

    rac18b08 reaf5e86  
    6666                .schedule       = hcd_schedule,
    6767                .irq_hook       = hcd_interrupt,
    68                 .ep_add_hook    = endpoint_init,
    69                 .ep_remove_hook = endpoint_fini,
     68                .ep_add_hook    = endpoint_init,
     69                .ep_remove_hook = endpoint_fini,
    7070                .status_hook    = hcd_status,
    7171        }
  • uspace/drv/bus/usb/xhci/rh.c

    rac18b08 reaf5e86  
    11/*
    2  * Copyright (c) 2017 Michal Staruch
     2n * Copyright (c) 2017 Michal Staruch
    33 * All rights reserved.
    44 *
     
    317317 */
    318318static int req_clear_hub_feature(usbvirt_device_t *device,
    319     const usb_device_request_setup_packet_t *setup_packet,
    320     uint8_t *data, size_t *act_size)
     319        const usb_device_request_setup_packet_t *setup_packet,
     320        uint8_t *data, size_t *act_size)
    321321{
    322322        /* TODO: Implement me! */
     
    337337 */
    338338static int req_get_port_status(usbvirt_device_t *device,
    339     const usb_device_request_setup_packet_t *setup_packet,
    340     uint8_t *data, size_t *act_size)
     339        const usb_device_request_setup_packet_t *setup_packet,
     340        uint8_t *data, size_t *act_size)
    341341{
    342342        xhci_rh_t *hub = virthub_get_data(device);
     
    380380 */
    381381static int req_clear_port_feature(usbvirt_device_t *device,
    382     const usb_device_request_setup_packet_t *setup_packet,
    383     uint8_t *data, size_t *act_size)
     382        const usb_device_request_setup_packet_t *setup_packet,
     383        uint8_t *data, size_t *act_size)
    384384{
    385385        xhci_rh_t *hub = virthub_get_data(device);
     
    437437 */
    438438static int req_set_port_feature(usbvirt_device_t *device,
    439     const usb_device_request_setup_packet_t *setup_packet,
    440     uint8_t *data, size_t *act_size)
     439        const usb_device_request_setup_packet_t *setup_packet,
     440        uint8_t *data, size_t *act_size)
    441441{
    442442        xhci_rh_t *hub = virthub_get_data(device);
     
    478478 */
    479479static int req_status_change_handler(usbvirt_device_t *device,
    480     usb_endpoint_t endpoint, usb_transfer_type_t tr_type,
    481     void *buffer, size_t buffer_size, size_t *actual_size)
     480        usb_endpoint_t endpoint, usb_transfer_type_t tr_type,
     481        void *buffer, size_t buffer_size, size_t *actual_size)
    482482{
    483483        xhci_rh_t *hub = virthub_get_data(device);
     
    574574/** Virtual XHCI root hub ops */
    575575static usbvirt_device_ops_t ops = {
    576         .control = control_transfer_handlers,
    577         .data_in[HUB_STATUS_CHANGE_PIPE] = req_status_change_handler,
     576        .control = control_transfer_handlers,
     577        .data_in[HUB_STATUS_CHANGE_PIPE] = req_status_change_handler,
    578578};
    579579
  • uspace/drv/bus/usb/xhci/rh.h

    rac18b08 reaf5e86  
    7676        usb_transfer_batch_t *unfinished_interrupt_transfer;
    7777
    78   /* Number of hub ports. */
     78        /* Number of hub ports. */
    7979        uint8_t max_ports;
    8080} xhci_rh_t;
  • uspace/drv/bus/usb/xhci/transfers.c

    rac18b08 reaf5e86  
    150150                (usb_device_request_setup_packet_t*) batch->setup_buffer;
    151151
    152         /* For the TRB formats, see xHCI specification 6.4.1.2 */
     152        /* For the TRB formats, see xHCI specification 6.4.1.2 */
    153153        xhci_transfer_t *transfer = xhci_transfer_alloc(batch);
    154154
    155         xhci_trb_t trb_setup;
    156         memset(&trb_setup, 0, sizeof(xhci_trb_t));
    157 
    158         TRB_CTRL_SET_SETUP_WVALUE(trb_setup, setup->value);
    159         TRB_CTRL_SET_SETUP_WLENGTH(trb_setup, setup->length);
    160         TRB_CTRL_SET_SETUP_WINDEX(trb_setup, setup->index);
    161         TRB_CTRL_SET_SETUP_BREQ(trb_setup, setup->request);
    162         TRB_CTRL_SET_SETUP_BMREQTYPE(trb_setup, setup->request_type);
    163 
    164         /* Size of the setup packet is always 8 */
    165         TRB_CTRL_SET_XFER_LEN(trb_setup, 8);
    166         // if we want an interrupt after this td is done, use
    167         // TRB_CTRL_SET_IOC(trb_setup, 1);
    168 
    169         /* Immediate data */
    170         TRB_CTRL_SET_IDT(trb_setup, 1);
    171         TRB_CTRL_SET_TRB_TYPE(trb_setup, XHCI_TRB_TYPE_SETUP_STAGE);
    172         TRB_CTRL_SET_TRT(trb_setup, get_transfer_type(&trb_setup, setup->request_type, setup->length));
    173 
    174         /* Data stage */
     155        xhci_trb_t trb_setup;
     156        memset(&trb_setup, 0, sizeof(xhci_trb_t));
     157
     158        TRB_CTRL_SET_SETUP_WVALUE(trb_setup, setup->value);
     159        TRB_CTRL_SET_SETUP_WLENGTH(trb_setup, setup->length);
     160        TRB_CTRL_SET_SETUP_WINDEX(trb_setup, setup->index);
     161        TRB_CTRL_SET_SETUP_BREQ(trb_setup, setup->request);
     162        TRB_CTRL_SET_SETUP_BMREQTYPE(trb_setup, setup->request_type);
     163
     164        /* Size of the setup packet is always 8 */
     165        TRB_CTRL_SET_XFER_LEN(trb_setup, 8);
     166        // if we want an interrupt after this td is done, use
     167        // TRB_CTRL_SET_IOC(trb_setup, 1);
     168
     169        /* Immediate data */
     170        TRB_CTRL_SET_IDT(trb_setup, 1);
     171        TRB_CTRL_SET_TRB_TYPE(trb_setup, XHCI_TRB_TYPE_SETUP_STAGE);
     172        TRB_CTRL_SET_TRT(trb_setup, get_transfer_type(&trb_setup, setup->request_type, setup->length));
     173
     174        /* Data stage */
    175175        xhci_trb_t trb_data;
    176176        memset(&trb_data, 0, sizeof(xhci_trb_t));
    177177
    178         if (setup->length > 0) {
    179                 trb_data.parameter = (uintptr_t) addr_to_phys(batch->buffer);
    180 
    181                 // data size (sent for OUT, or buffer size)
    182                 TRB_CTRL_SET_XFER_LEN(trb_data, batch->buffer_size);
    183                 // FIXME: TD size 4.11.2.4
    184                 TRB_CTRL_SET_TD_SIZE(trb_data, 1);
    185 
    186                 // if we want an interrupt after this td is done, use
    187                 // TRB_CTRL_SET_IOC(trb_data, 1);
    188 
    189                 // Some more fields here, no idea what they mean
    190                 TRB_CTRL_SET_TRB_TYPE(trb_data, XHCI_TRB_TYPE_DATA_STAGE);
     178        if (setup->length > 0) {
     179                trb_data.parameter = (uintptr_t) addr_to_phys(batch->buffer);
     180
     181                // data size (sent for OUT, or buffer size)
     182                TRB_CTRL_SET_XFER_LEN(trb_data, batch->buffer_size);
     183                // FIXME: TD size 4.11.2.4
     184                TRB_CTRL_SET_TD_SIZE(trb_data, 1);
     185
     186                // if we want an interrupt after this td is done, use
     187                // TRB_CTRL_SET_IOC(trb_data, 1);
     188
     189                // Some more fields here, no idea what they mean
     190                TRB_CTRL_SET_TRB_TYPE(trb_data, XHCI_TRB_TYPE_DATA_STAGE);
    191191
    192192                transfer->direction = get_data_direction(&trb_setup, setup->request_type, setup->length);
    193                 TRB_CTRL_SET_DIR(trb_data, transfer->direction);
    194         }
    195 
    196         /* Status stage */
    197         xhci_trb_t trb_status;
    198         memset(&trb_status, 0, sizeof(xhci_trb_t));
    199 
    200         // FIXME: Evaluate next TRB? 4.12.3
    201         // TRB_CTRL_SET_ENT(trb_status, 1);
    202 
    203         // if we want an interrupt after this td is done, use
    204         TRB_CTRL_SET_IOC(trb_status, 1);
    205 
    206         TRB_CTRL_SET_TRB_TYPE(trb_status, XHCI_TRB_TYPE_STATUS_STAGE);
    207         TRB_CTRL_SET_DIR(trb_status, get_status_direction(&trb_setup, setup->request_type, setup->length));
     193                TRB_CTRL_SET_DIR(trb_data, transfer->direction);
     194        }
     195
     196        /* Status stage */
     197        xhci_trb_t trb_status;
     198        memset(&trb_status, 0, sizeof(xhci_trb_t));
     199
     200        // FIXME: Evaluate next TRB? 4.12.3
     201        // TRB_CTRL_SET_ENT(trb_status, 1);
     202
     203        // if we want an interrupt after this td is done, use
     204        TRB_CTRL_SET_IOC(trb_status, 1);
     205
     206        TRB_CTRL_SET_TRB_TYPE(trb_status, XHCI_TRB_TYPE_STATUS_STAGE);
     207        TRB_CTRL_SET_DIR(trb_status, get_status_direction(&trb_setup, setup->request_type, setup->length));
    208208
    209209        uintptr_t dummy = 0;
    210         xhci_trb_ring_enqueue(ring, &trb_setup, &dummy);
     210        xhci_trb_ring_enqueue(ring, &trb_setup, &dummy);
    211211        if (setup->length > 0) {
    212212                xhci_trb_ring_enqueue(ring, &trb_data, &dummy);
    213213        }
    214         xhci_trb_ring_enqueue(ring, &trb_status, &transfer->interrupt_trb_phys);
     214        xhci_trb_ring_enqueue(ring, &trb_status, &transfer->interrupt_trb_phys);
    215215
    216216        list_append(&transfer->link, &hc->transfers);
    217217
    218         /* For control transfers, the target is always 1. */
    219         hc_ring_doorbell(hc, slot_id, 1);
     218        /* For control transfers, the target is always 1. */
     219        hc_ring_doorbell(hc, slot_id, 1);
    220220        return EOK;
    221221}
     
    236236
    237237        // data size (sent for OUT, or buffer size)
    238         TRB_CTRL_SET_XFER_LEN(trb, batch->buffer_size);
    239         // FIXME: TD size 4.11.2.4
    240         TRB_CTRL_SET_TD_SIZE(trb, 1);
     238        TRB_CTRL_SET_XFER_LEN(trb, batch->buffer_size);
     239        // FIXME: TD size 4.11.2.4
     240        TRB_CTRL_SET_TD_SIZE(trb, 1);
    241241
    242242        // we want an interrupt after this td is done
     
    245245        TRB_CTRL_SET_TRB_TYPE(trb, XHCI_TRB_TYPE_NORMAL);
    246246
    247         xhci_trb_ring_enqueue(ring, &trb, &transfer->interrupt_trb_phys);
     247        xhci_trb_ring_enqueue(ring, &trb, &transfer->interrupt_trb_phys);
    248248        list_append(&transfer->link, &hc->transfers);
    249249
    250         /* For control transfers, the target is always 1. */
    251         hc_ring_doorbell(hc, slot_id, 1);
     250        /* For control transfers, the target is always 1. */
     251        hc_ring_doorbell(hc, slot_id, 1);
    252252        return EOK;
    253253}
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